Method of forming metal line in semiconductor device
View Patent ↗The present invention discloses a method for forming a metal line in a semiconductor device including the steps of: sequentially forming a first insulation film, an etch barrier film and a second insulation film on a semiconductor substrate on which the substructure has been formed; forming a plurality of via holes for exposing the substructure in different points by patterning the second insulation film, the etch barrier film and the first insulation film of the resulting structure, and forming a plurality of trench patterns respectively on the plurality of via holes by re-patterning the second insulation film and the etch barrier film of the resulting structure; forming a plurality of vias and trenches by filling a metal material in the plurality of via holes and trench patterns; removing the second insulation film; and forming a third insulation film over the resulting structure including the removed second insulation film.
1. A method for forming a metal line in a semiconductor device, comprising the steps of:
sequentially forming a first insulation film, an etch barrier film and a second insulation film on a semiconductor substrate on which a substructure has been formed;
forming a plurality of via holes for exposing the substructure in different points by patterning the second insulation film, the etch barrier film and the first insulation film of the resulting structure, and forming a plurality of trench patterns respectively on the plurality of via holes by re-patterning the second insulation film and the etch barrier film of the resulting structure;
forming a plurality of vias and trenches by filling a metal material in the plurality of via holes and trench patterns;
removing the second insulation film; and
forming a third insulation film over the resulting structure including the removed second insulation film.
2. The method of claim 1 , wherein the step for removing the second insulation film reduces a width and thickness of the trenches as well as a thickness of the etch barrier film.
3. The method of claim 1 , wherein the step for removing the second insulation film is one of a wet dip process and a dry etching process.
4. The method of claim 3 , wherein the wet dip process uses an appropriate etching solution for reducing the metal material filled in the trenches by a predetermined thickness after removing the second insulation film, by using one of BOE (20:1 to 300:1), HF (50:1 to 100:1) and a mixing solution of BOE and HF.
5. The method of claim 3 , wherein the dry etching process uses an appropriate etching gas for reducing the metal material filled in the trenches by a predetermined thickness after removing the second insulation film, by using a combination of C 5 F 8 +O 2 /CF 4 +CH 2 F 2 /CHF 3 +O 2 .
6. The method of claim 1 , wherein the first insulation film is one of SiO 2 film, BPSG film, PSG film, FSG film, PE-TEOS film, PE-SiH 4 film, HDP USG film, HDP PSG film and APL oxide film.
7. The method of claim 1 , wherein the second insulation film is one of SiN film and SiON film.
8. The method of claim 1 , wherein the third insulation film is formed by using a dielectric film having a dielectric constant k equal to or less than 3.