Method for forming polysilicon plug of semiconductor device
View Patent ↗Disclosed is a method for forming a polysilicon plug of a semiconductor device. The method comprises the steps of: forming a stacked pattern of a wordline and a hard mask film on a semiconductor substrate comprising a cell region and a peripheral circuit region; forming a spacer on a sidewall of the stacked pattern; forming an interlayer insulating film on the semiconductor substrate; polishing the interlayer insulating film via a CMP process using the hard mask film as a polishing barrier film; forming a barrier film on the semiconductor substrate including the interlayer insulating film; selectively etching the barrier film and the interlayer insulating film to form a landing plug contact hole; depositing a polysilicon film filling the landing plug contact hole on the semiconductor substrate; blanket-etching the polysilicon film using the barrier film as an etching barrier film; and polishing the polysilicon film and the barrier film using the hard mask film as a polishing barrier film to form a polysilicon plug.
1. A method for forming a polysilicon plug of a semiconductor device, comprising the steps of:
(a) forming a stacked pattern of a wordline and a hard mask film on a semiconductor substrate comprising a cell region and a peripheral circuit region;
(b) forming a spacer on a sidewall of the stacked pattern;
(c) forming an interlayer insulating film on the semiconductor substrate;
(d) polishing the interlayer insulating film via a CMP process until the hard mask film is exposed to planarize an entire surface of the resulting structure;
(e) forming a barrier film on the planarized entire surface of the exposed hard mask film and the interlayer insulating film;
(f) selectively etching the barrier film and the interlayer insulating film to form a landing plug contact hole;
(g) depositing a polysilicon film filling the landing plug contact hole on the semiconductor substrate;
(h) blanket-etching the polysilicon film using the barrier film as an etching barrier film; and
(i) polishing the polysilicon film and the barrier film using the hard mask film as a polishing barrier film to form a polysilicon plug.
2. The method according to claim 1 , wherein the wordline comprises a film selected from a group consisting of a polysilicon film, a doped polysilicon film, a WSi x film, a WN film, a W film and TiSi x film.
3. The method according to claim 1 , wherein the hard mask film comprises a Si 3 N 4 film formed via a LP-CVD (low pressure chemical vapor deposition) method using SiH 2 Cl 2 and NH 3 as a source or via a PE-CVD (plasma enhanced chemical vapor deposition) method using SiH 4 and NH 3 as a source.
4. The method according to claim 1 , wherein a thickness of the hard mask film ranges from 300 to 3000 Å.
5. The method according to claim 1 , wherein the spacer comprises as a stacked structure of nitride film and oxide film.
6. The method according to claim 1 , wherein the interlayer insulating film is selected from a group consisting of a BPSG (boron phosphorous silicate glass) oxide film, a PSG (phosphorous silicate glass) oxide film, an APL (advanced planarization layer) oxide film, an ALD (atomic layer deposition) oxide film and a SOD (spin on dielectric) oxide film.
7. The method according to claim 1 , wherein the interlayer insulating film ranges from 1.1 to 5 times in thickness of the stacked pattern.
8. The method according to claim 1 , wherein the step (d) is performed using a slurry for oxide film, the sluny having a pH ranging from 8 to 12 and containing an abrasive having a particle size ranging from 10 to 800 nm.
9. The method according to claim 8 , wherein the abrasive is selected from a group consisting of SiO 2 , CeO 2 , Al 2 O 3 , ZrO 2 and combinations thereof.
10. The method according to claim 1 , wherein the step (d) is performed using a slurry, the slurry having a pH ranging from 4 to 10, oxide film to nitride film polishing selectivity of 1˜500:1 and containing an abrasive having a particle size ranging from 10 to 800 nm.
11. The method according to claim 10 , wherein the abrasive is selected from a group consisting of SiO 2 , CeO 2 , Al 2 O 3 , ZrO 2 and combinations thereof.
12. The method according to claim 1 , wherein the step (d) comprises: (1) a first CMP process using a slurry for an oxide film, the slurry having a pH ranging from 8 to 12 and containing an abrasive having a particle size ranging from 10 to 800 nm to remove 0.1˜99.9% of thickness of the interlayer insulating film on the hard mask film, and (2) a second CMP process using a slurry, the sluny having a pH ranging from 4 to 10, oxide film to nitride film polishing selectivity of 1˜500:1 and containing an abrasive having a particle size ranging from 10 to 800 nm to remove the remaining portion of the interlayer insulating film.
13. The method according to claim 12 , wherein the abrasive is selected from a group consisting of SiO 2 , CeO 2 , Al 2 O 3 , ZrO 2 and combinations thereof.
14. The method according to claim 1 , wherein the step (d) is performed using a sluny having a pH ranging from 1 to 9 and containing a colloidal silica to expose the hard mask film on the cell region.
15. The method according to claim 1 , wherein the step (d) comprises performing a CMP process to polish a predetermined thickness of the interlayer insulating film, and blanket-etching a remaining portion of the interlayer insulating film to expose the hard mask film.
16. The method according to claim 1 , wherein the step (d) comprises performing a CMP process to polish a predetermined thickness of the interlayer insulating film, and blanket-etching and a wet-etching a remaining portion of the interlayer insulating film to expose the hard mask film.
17. The method according to claim 1 , wherein the barrier film is selected from a group consisting of a polysilicon film, a Si 3 N 4 film, a SiO x N y film, a tungsten film and a tungsten alloy film.
18. The method according to claim 1 , wherein the step (f) comprises:
(i) forming a photoresist film pattern on the barrier film;
(ii) selectively etching the barrier film using the photoresist film pattern as an etching mask to form a barrier film pattern;
(iii) removing the photoresist film pattern; and
(iv) performing a SAC process using the barrier film pattern as an etching mask to form the landing plug contact hole.
19. The method according to claim 18 , wherein the steps (i) through (iv) are performed in-situ in a single chamber.
20. The method according to claim 18 , wherein the steps (i) through (iii) are performed in a first chamber, and the step (iv) is performed in a second chamber.
21. The method according to claim 18 , wherein the step (iv) is performed using a gas selected from a group consisting of C 4 F 8 , C 4 F 6 and C 5 F 8 as a source.
22. The method according to claim 1 , wherein the polysilicon film is formed via an in-situ doping process or a SEG (Selective Epitaxial Growing) process.
23. The method according to claim 1 , wherein a thickness of the polysilicon film ranges from 1000 to 10000 Å.
24. The method according to claim 1 , wherein the step (i) comprises a CMP process employing a slurry for oxide film, the slurry having a pH ranging from 8 to 12 and containing an abrasive having a particle size ranging from 10 to 800 nm.
25. The method according to claim 24 , wherein the abrasive is selected from a group consisting of SiO 2 , CeO 2 , Al 2 O 3 , ZrO 2 and combinations thereof.
26. The method according to claim 1 , wherein the step (i) comprises a CMP process employing a slurry, the slurry having a pH ranging from 4 to 10, an oxide film to nitride film polishing selectivity of 1˜500:1 and containing an abrasive having a particle size ranging from 10 to 800 nm.
27. The method according to claim 26 , wherein the abrasive is selected from a group consisting of SiO 2 , CeO 2 , Al 2 O 3 , ZrO 2 and combinations thereof.
28. The method according to claim 1 , wherein the step (i) comprises (1) a first CMP process using a slurry for oxide film to remove predetermined thickness of the polysilicon film, and (2) a second CMP process performed using a slurry having an oxide film to nitride film polishing selectivity of 1˜500:1 to expose the hard mask film on the cell region.
29. The method according to claim 1 , wherein the step (i) comprises (1) a first CMP process using a slurry for polysilicon film to remove predetermined thickness of the polysilicon film, and (2) a second CMP process performed using a slurry having an oxide film to nitride film polishing selectivity of 1˜500:1 to expose the hard mask film on the cell region.
30. The method according to claim 1 , wherein the step (i) comprises (1) a first CMP process is using a slurry for oxide film to remove predetermined thickness of the polysilicon film, and (2) a second CMP process is performed using a slurry for oxide film to expose the hard mask film on the cell region.
31. The method according to claim 1 , wherein the step (i) is performed using a slurry of having a pH ranging from 1 to 9 and containing a colloidal silica to expose the hard mask film on the cell region.
32. The method according to claim 1 , further comprising, after the step (d) or (i), a post cleaning process using NH 3 , HF or SC-1(NH 4 OH+H 2 O 2 +H 2 O).