IP Library Granted Patent US 7,126,373
Granted Patent B1
US 7,126,373 · App. 10/882,839 · Granted Oct 24, 2006

Configurable logic circuits with commutative properties

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Quick Facts
Patent No.
US 7,126,373
App. No.
10/882,839
Granted
Oct 24, 2006
Kind
B1
Abstract

Some embodiments of the invention provide a configurable logic circuit. The logic circuits has inputs for receiving input data. It also has a first connecting circuit for receiving configuration data and at least a portion of the input data. Based at least partially on the received portion of the input data, the first connecting circuit selects configuration data sub-sets. The logic circuit also includes a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing the output data. At least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce output data.

Claims (25)

1. A configurable logic circuit having inputs for receiving input data, the logic circuit comprising:

a first connecting circuit for receiving configuration data, at least a portion of a configuration signal, and at least a portion of the input data, and for selecting configuration data sub-sets at least partially based on the received portion of the input and partially based on the received portion of the configuration data; and

a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing output data;

wherein at least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce the output data.

2. The configurable logic circuit of claim 1 , wherein the second core-logic circuit receives at least a portion of the configuration signal for directing the second logic circuit to select different sub-sets of the configuration data.

3. The configurable logic circuit of claim 2 , wherein the first and second circuits are multiplexers.

4. The configurable logic circuit of claim 2 , wherein the first circuit includes a set of multiplexers and the second circuit includes a set of multiplexers, wherein each multiplexer receives input signals and select data and provides an output by selecting a sub-set of its input signals based on the received select data.

5. The configurable logic circuit of claim 4 , wherein each first-circuit multiplexer receives a portion of the input data and a portion of the configuration signal as select data.

6. The configurable logic circuit of claim 2 , wherein the second core-logic circuit receives at least a portion of the input data.

7. The configurable logic circuit of claim 1 , wherein the configuration signal is a clock signal.

8. The configurable logic circuit of claim 1 , wherein the configuration signal is a control signal.

9. A configurable logic circuit for performing a plurality of functions, the logic circuit having inputs for receiving input data, the logic circuit comprising:

a) a first connecting circuit for receiving configuration data; and

b) a second core-logic circuit for receiving sub-sets of the configuration data from the first connecting circuit and receiving at least a portion of a periodic configuration signal for directing the logic circuit to select different sub-sets of the configuration data, and for providing output data;

wherein each configuration data sub-set determines a particular function that the logic circuit performs on the input data to produce the output data.

10. The configurable logic circuit of claim 9 , wherein the first connecting circuit receives at least a portion of the configuration signal and at least a portion of the input data.

11. A configurable logic circuit receiving input data, wherein the logic circuit computes a function based on the input data, the logic circuit comprising:

first and second connecting circuits, each having input, output, and select terminal sets, wherein each connecting circuit connects its input terminals to its output terminals in a particular manner based on signals on its select terminal sets;

the first connecting circuit for receiving configuration data at its input terminals and at least a portion of the input data at its select lines; and

the second connecting circuit for communicatively coupling to the output terminal set of the first connecting circuit;

wherein at least one of the first and second connecting circuits receives a portion of a periodic signal at its select terminal.

12. The configurable integrated circuit of claim 11 , wherein the second connecting circuit receives all of the periodic signal.

13. The configurable integrated circuit of claim 12 , wherein the first connecting circuit receives all of the input data.

14. The configurable integrated circuit of claim 12 , wherein the first circuit includes a set of multiplexers and the second circuit includes a set of multiplexers, wherein each multiplexer receives input signals and select data and provides an output by selecting a sub-set of its input signals based on the received select data.

15. The configurable logic circuit of claim 11 , wherein the periodic signal is a clock signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061827/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2022
From: ALTERA CORPORATION
To: INTEL CORPORATION
Reel/Frame 060778/0032 →