Methods of fabricating semiconductor structures comprising epitaxial Hf3Si2 layers
View Patent ↗Methods are provided for fabricating semiconductor structures and semiconductor device structures utilizing epitaxial Hf 3 Si 2 layers. A process in accordance with one embodiment of the invention begins by disposing a silicon substrate in a processing chamber. The pressure within the processing chamber and a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C. is established. A layer of Hf 3 Si 2 then is grown overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
1. A process for fabricating a semiconductor structure, the process comprising the steps of:
disposing a silicon substrate in a processing chamber;
decreasing the pressure within the processing chamber;
establishing a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C.; and
epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
2. The process for fabricating a semiconductor structure of claim 1 , wherein the step of disposing a silicon substrate in a processing chamber comprises the step of disposing in a processing chamber a (001) silicon substrate that has been off-cut towards a (110) direction.
3. The process for fabricating a semiconductor structure of claim 1 , further comprising the step of forming a silicon oxide layer on the silicon substrate before the step of establishing a temperature of the silicon substrate.
4. The process for fabricating a semiconductor structure of claim 1 , further comprising the step of deoxidizing the silicon substrate with an alkaline earth metal before the step of establishing a temperature of the silicon substrate.
5. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate is performed by one selected from the group consisting of MBE, CVD, MOCVD, MEE, ALE, PVD, CSD, and PLD.
6. The process for fabricating a semiconductor structure of claim 1 , wherein the step of decreasing the pressure in the processing chamber comprise the step of decreasing the pressure to within a range of about 10 −10 to about 10 −7 Torr.
7. The process for fabricating a semiconductor structure of claim 1 , wherein the step of establishing a temperature of the silicon substrate comprises the step of establishing a temperature of the silicon substrate in a range of about 450° C. to about 650° C.
8. The process for fabricating a semiconductor structure of claim 7 , wherein the step of establishing a temperature of the silicon substrate comprises the step of establishing a temperature of the silicon substrate in a range of about 550° C. to about 650° C.
9. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute comprises the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about two (2) monolayers per minute.
10. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers comprises the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate for a time period in a range of about five (5) minutes to about one (1) hour.
11. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate comprises the step of exposing the silicon substrate to a source of metal hafnium.
12. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate comprises the step of exposing the silicon substrate to a source of Hf 3 Si 2 .
13. The process for fabricating a semiconductor structure of claim 1 , wherein the step of epitaxially growing a layer of Hf 3 Si 2 overlying the silicon substrate comprises the step of exposing the silicon substrate to a source of metal hafnium and a source of silicon that create a flux in the chamber having a hafnium:silicon ratio of about 3:2.
14. The process for fabricating a semiconductor structure of claim 1 , the process further comprising the step of exposing the silicon substrate to a surfactant after the step of disposing the silicon substrate in the processing chamber.
15. A process for fabricating a semiconductor structure, the process comprising the steps of:
providing a silicon substrate;
creating and maintaining the silicon substrate in an ultra high vacuum environment;
establishing a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C.; and
exposing the silicon substrate to a first source of hafnium for a time period sufficient to grow an epitaxial Hf 3 Si 2 layer having a thickness in the range of from about one to about ten (10) mono layers.
16. The process for fabricating a semiconductor structure of claim 15 , wherein the step of providing a silicon substrate comprises the step of providing a (001) silicon substrate that has been off-cut towards a (110) direction.
17. The process for fabricating a semiconductor structure of claim 15 , further comprising the step of forming a silicon oxide layer on the silicon substrate before the step of establishing a temperature of the silicon substrate.
18. The process for fabricating a semiconductor structure of claim 15 , wherein the step of exposing the silicon substrate to a first source of hafnium is performed by one of MBE, CVD, MOCVD, MEE, ALE, PVD, CSD, and PLD.
19. The process for fabricating a semiconductor structure of claim 15 , wherein the step of creating and maintaining the silicon substrate in an ultra high vacuum environment comprises the step of creating and maintaining the silicon substrate in an environment having a pressure in a range of about 10 −10 to about 10 −7 Torr.
20. The process for fabricating a semiconductor structure of claim 15 , wherein the step of establishing a temperature of the silicon substrate comprises the step of establishing a temperature of the silicon substrate in a range of about 450° C. to about 650° C.
21. The process for fabricating a semiconductor structure of claim 15 , wherein the step of establishing a temperature of the silicon substrate comprises the step of establishing a temperature of the silicon substrate in a range of about 550° C. to about 650° C.
22. The process for fabricating a semiconductor structure of claim 15 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of epitaxially growing Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
23. The process for fabricating a semiconductor structure of claim 22 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of epitaxially growing Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about two (2) monolayers per minute.
24. The process for fabricating a semiconductor structure of claim 15 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of metal hafnium.
25. The process for fabricating a semiconductor structure of claim 15 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of Hf 3 Si 2 .
26. The process for fabricating a semiconductor structure of claim 15 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of metal hafnium and a source of silicon that create a flux having a hafnium:silicon ratio of about 3:2.
27. The process for fabricating a semiconductor structure of claim 15 , the process further comprising the step of exposing the silicon substrate to a surfactant after the step of providing a silicon substrate.
28. The process for fabricating a semiconductor structure of claim 15 , further comprising the steps of:
lowering the temperature of the silicon substrate to a temperature in a range of approximately 10° C. to approximately 500° C.;
exposing the silicon substrate to a second source of hafnium for a time period in a range of about five (5) to about twenty (20) minutes; and
subjecting the silicon substrate to an anneal at a temperature in a range of approximately 500° C. to approximately 700° C.
29. The process for fabricating a semiconductor structure of claim 28 , wherein the steps of lowering the temperature of the silicon substrate, exposing the silicon substrate to a second source of hafnium, and subjecting the silicon substrate to an anneal are performed repeatedly until an epitaxial Hf 3 Si 2 layer having a desired thickness is achieved.
30. The process for fabricating a semiconductor structure of claim 28 , wherein the step of lowering the temperature of the silicon substrate comprises the step of lowering the temperature of the silicon substrate to a temperature in a range of about 150° C. to about 300° C.
31. The process for fabricating a semiconductor structure of claim 28 , wherein the step of exposing the silicon substrate to a second source of hafnium comprises the step of exposing the silicon substrate to the first source of hafnium.
32. A process for fabricating a semiconductor structure, the process comprising the steps of:
disposing a silicon substrate in a processing chamber;
creating and maintaining an ultra high vacuum environment in the processing chamber;
establishing a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C.;
exposing the silicon substrate to a first source of hafnium to grow a layer of epitaxial Hf 3 Si 2 having a thickness of about one (1) to ten (10) monolayers;
lowering the temperature of the silicon substrate to a temperature in a range of approximately 10° C. to approximately 500° C.;
exposing the silicon substrate to a second source of hafnium for a time period in a range of about five (5) to about twenty (20) minutes to increase the thickness of the layer of epitaxial Hf 3 Si 2 ; and
subjecting the silicon substrate to an anneal at a temperature in a range of approximately 500° C. to approximately 700° C.
33. The process for fabricating a semiconductor structure of claim 32 , wherein the step of creating and maintaining an ultra high vacuum environment comprises the step of creating and maintaining an environment having a pressure in a range of about 10 −10 to about 10 −7 Torr.
34. The process for fabricating a semiconductor structure of claim 32 , the process further comprising the step of exposing the silicon substrate to a surfactant after the step of disposing the silicon substrate in a processing chamber.
35. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of epitaxially growing Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
36. The process for fabricating a semiconductor device structure of claim 35 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of epitaxially growing Hf 3 Si 2 overlying the silicon substrate at a rate in the range of about one (1) to about two (2) monolayers per minute.
37. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of metal hafnium.
38. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of Hf 3 Si 2 .
39. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of exposing the silicon substrate to a first source of hafnium comprises the step of exposing the silicon substrate to a source of metal hafnium and a source of silicon that create a flux in the chamber having a hafnium:silicon ratio of about 3:2.
40. The process for fabricating a semiconductor device structure of claim 32 , wherein each of the steps of exposing the silicon substrate to a first source of hafnium and exposing the silicon substrate to a second source of hafnium is performed by one of MBE, CVD, MOCVD, MEE, ALE, PVD, CSD, and PLD.
41. The process for fabricating a semiconductor device structure of claim 32 , wherein the steps of lowering the temperature of the silicon substrate, exposing the silicon substrate to a second source of hafnium, and subjecting the silicon substrate to an anneal are performed repeatedly until an epitaxial Hf 3 Si 2 layer having a desired thickness is achieved.
42. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of lowering the temperature of the silicon substrate comprises the step of lowering the temperature of the silicon substrate to a temperature in a range of about 150° C. to about 300° C.
43. The process for fabricating a semiconductor device structure of claim 32 , wherein the step of exposing the silicon substrate to a second source of hafnium comprises the step of exposing the silicon substrate to the first source of hafnium.