Method for manufacturing flash memory device
View Patent ↗Disclosed is a method for manufacturing a flash memory device. In a process of forming a flash memory cell and a select transistor through a process of forming a polysilicon layer for a floating gate, a process of forming a dielectric layer and a process of forming a polysilicon layer for a control gate, the dielectric layer is formed and the dielectric layer in a region where a select transistor will be formed is then removed, thereby forming a select gate line in which the polysilicon layer for the floating gate and the polysilicon layer for the control gate are electrically connected. Furthermore, in a process of forming a flash memory cell and a select transistor through a process of forming a polysilicon layer for a floating gate, a process of forming a dielectric layer and a process of forming a polysilicon layer for a control gate, forming an interlayer insulating layer on the entire structure and then forming a contact, the dielectric layer on the polysilicon layer for the floating gate in a region where a select transistor will be formed and the polysilicon layer for the control gate are all removed whereby the polysilicon layer for the floating gate and a contact plug are directly electrically connected.
1. A method for manufacturing a flash memory device, comprising the steps of:
providing a semiconductor substrate in which a plurality of word lines, a drain select line and a source select line are formed, wherein the word lines have a stack structure of a material layer for a floating gate, a dielectric layer and a material layer for a control gate;
forming an interlayer insulating layer on the entire structure;
forming a contact hole by etching the material layer for the control gate and the dielectric layer in the drain select line and the source select line so that the material layer for the floating gate in the drain select line and the source select line is exposed; and
filling the contact hole with a conductive material layer to form a contact plug.
2. The method as claimed in claim 1 , further comprising the step of before the contact plug is formed, implanting an impurity into the material layer for the floating gate that is exposed through the contact hole in order to lower resistance of the material layer for the floating gate.
3. The method as claimed in claim 1 , comprising forming the contact plug using polysilicon or a metal material.