Granted Patent B2

US 7,738,563 · App. 10/887,132 · Granted Jun 15, 2010

Abstract

Claims (44)

1. A method for filtering a frame, the method comprises:

determining whether to perform loop deblocking filtering or post deblocking filtering;

configuring a hardware filter to operate as a loop deblocking filter or a post deblocking filter according to the determination;

determining, by a mode decision unit of the hardware filter, which filter to be applied by a filter arithmetic unit of the hardware filter;

processing, by a processing unit executing instructions, at least one portion of a frame to provide at least one processed frame portion,

performing, by a hardware filter of an image processing unit that is coupled to the processing unit, deblocking filtering of the at least one processed frame portion to provide at least one filtered frame portion; wherein the processing unit operates independently of the image processing unit;

wherein the at least one filtered frame portion is utilized in response to the determination;

wherein the deblocking filtering utilizes the filter arithmetic unit;

wherein if determining to perform loop deblocking then processing, by the processing unit, a frame portion while loop deblocking filtering another frame portion of the same frame; and

displaying processed frames.

2. The method of claim 1 wherein if determining to perform post deblocking filtering then the stage of performing deblocking filtering of at least one frame portion is executed after the stage of processing of the whole frame is completed.

3. The method of claim 1 further comprising a stage of generating a processed frame indication, indicating that a frame was processed by the processing unit.

4. The method of claim 1 wherein if determining to perform loop deblocking filtering then the at least one filtered frame portion is utilized during a stage of processing another frame.

5. The method of claim 1 further comprising generating, by the processing unit, a processed frame portion indication, indicative of a generation of the processed frame portion.

6. The method of claim 1 further comprising generating, by the hardware filter, a filtered frame indication, indicative of a generation of a filtered frame.

7. The method of claim 1 further comprising generating, if determining to perform post deblocking, a processed frame portion indication, indicative of a generation of the processed frame portion.

8. The method of claim 1 further comprising determining which at least one frame portion to process before proceeding to the stage of performing, by the hardware filter, deblocking filtering.

9. The method of claim 1 wherein the determining, by the mode decision unit of the hardware filter, which filter to be applied by the filter arithmetic unit of the hardware filter is responsive to a boundary strength parameter.

10. The method of claim 1 further comprising operating the processing unit at a low power consuming operational mode after the processing unit completed to process a frame.

11. The method of claim 1 further comprising a preliminary stage of pre-processing at least one frame portion.

12. The method of claim 1 wherein the processing comprises applying variable length encoding, de-quantizing and applying inverse discrete cosine transform operations.

13. A system for filtering a frame, the system comprises:

a hardware filter that is adapted to be configured as a loop deblocking filter or as a post deblocking filter such as to deblocking filter at least one processed frame portion to provide at least one filtered frame portion;

wherein the hardware filter comprises a mode decision unit that determines which filter to be applied by a filter arithmetic unit of the hardware filter; and

a processing unit that operates independently of an image processing unit in which the hardware filter is comprised; wherein the processing unit is adapted to execute instructions such as to determine whether to perform loop deblocking filtering or post deblocking filtering, and to process at least one portion of a frame to provide the at least one processed frame portion;

wherein the at least one filtered frame portion is utilized in response to the determination;

wherein if the processing unit determines to configure the hardware filter as a loop deblocking filter then the processing unit process a frame portion while the hardware filter performs loop deblocking filtering of another frame portion of the same frame.

14. The system of claim 13 wherein if configuring the hardware filter as a post deblocking filter then the hardware filter performs post deblocking of at least one frame portion after the processing unit processes the whole frame.

15. The system of claim 13 wherein the processing unit is adapted to generate a processed frame indication, indicating that a frame was processed by the processing unit.

16. The system of claim 13 wherein the hardware filter is adapted to deblocking filter of an image portion in parallel to a frame portion process by the processing unit.

17. The system of claim 13 wherein the processing unit is adapted to utilize filtered frames during the processing of another frame is the processing unit determined to apply loop deblocking filtering.

18. The system of claim 13 wherein the processing unit is adapted to generate a processed frame portion indication, indicative of a generation of the processed frame portion.

19. The system of claim 13 wherein the hardware filter is adapted to generate a filtered frame indication, indicative of a generation of a filtered frame.

20. The system of claim 13 wherein the processing unit is adapted to generate a processed frame indication if the processing unit determined to apply a post deblocking filtering.

21. The system of claim 13 wherein the processing unit is adapted to determine which at least one frame portion to process before performing deblocking filtering.

22. The system of claim 13 wherein the processing unit is adapted to operate in a low power consuming operational mode after the completing to process a frame.

23. The system according to claim 13 wherein the mode decision unit determines which filter to be applied by the filter arithmetic unit in response to a boundary strength parameter.

24. The system according to claim 13 wherein an order of decoding blocks of the frame by the processing unit differs from an order of the deblocking filtering of blocks of the frame by the hardware filter.

25. The method according to claim 1 wherein an order of decoding blocks of the frame by the processing unit differs from an order of the deblocking filtering of blocks of the frame by the hardware filter.

26. The system of claim 13 , wherein the hardware filter is configured to consume less power than the processing unit for deblocking filtering the processed frame portion.

27. The system of claim 13 , wherein the hardware filter is to receive processed Y, U and V frame portions, start to process the Y frame until a certain row, and filter the remaining Y frame, the U frame and the V frame after the processing unit indicates that processing the whole frame is completed.

28. The system of claim 19 , wherein the hardware filter is adapted to generate the filtered frame indication when an amount of pixels that have been filtered is less than a total number of pixels in a frame.

29. The system of claim 18 , wherein the processing unit is configured to generate the processed frame portion indication whenever the processing unit finishes processing pairs of block sequences, each block sequence extending through the entire width of the frame.

30. The system of claim 13 , wherein the hardware filter is configured to prevent from deblocking filtering processed frame portions of a frame before the processing unit has processed at least a predetermined amount of pixels, said predetermined amount of pixels programmed by a user.

Assignments (21)