IP Library Granted Patent US 7,015,097
Granted Patent B2
US 7,015,097 · App. 10/887,260 · Granted Mar 21, 2006

Method of manufacturing flash memory device

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Quick Facts
Patent No.
US 7,015,097
App. No.
10/887,260
Granted
Mar 21, 2006
Kind
B2
Abstract

Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H 2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H 2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.

Claims (28)

1. A method of manufacturing a flash memory device, comprising the steps of:

forming gates on a semiconductor substrate in a cell region and a peripheral circuit region;

performing a first rapid thermal oxidation process for recovering an etched damage during the gate forming process in an H 2 rich atmosphere so that an etched surface of a gate changes to a Si—H combination structure to prevent an abnormal oxidation from occurring and forming a sidewall oxide film thereby;

forming a cell transistor junction in the cell region;

forming a peripheral circuit transistor junction in the peripheral circuit region; and

performing a second rapid thermal oxidation process for activating ion implanted in the junctions.

2. The method of manufacturing a flash memory device of claim 1 , the gates in the cell region is constructed by stacking a tunnel oxide film, a first polysilicon layer, a lower oxide film, an intermediate nitride film, an upper oxide film, a second polysilicon layer, a tungsten silicide layer, and a cap insulation film.

3. The method of manufacturing a flash memory device of claim 1 , the sidewall oxide film is formed with thickness of 30 to 80.

4. The method of manufacturing a flash memory device of claim 1 , the first and second rapid thermal oxidation processes respectively comprise the steps of:

loading a wafer to a chamber of 400° C.;

recovering the internal of the chamber;

ramping-up the internal temperature of the chamber up to 850 to 1050° C.;

stabilizing the internal temperature of the chamber;

performing a thermal oxidation process in the H 2 rich atmosphere;

N 2 -purging the internal of the chamber;

ramping-down the internal temperature of the chamber down to 400° C.; and

unloading the wafer from the chamber.

5. The method of manufacturing a flash memory device of claim 4 , the loading step is performed by setting an internal pressure of the chamber for 50 Torr and an inflow of N 2 gas between 5 and 10 slpm.

6. The method of manufacturing a flash memory device of claim 4 , the recovering step is performed by setting the internal pressure of the chamber for 50 Torr and the inflow of N 2 gas between 5 and 10 slpm.

7. The method of manufacturing a flash memory device of claim 4 , the ramping-up step is performed for 20 to 90 minutes by setting the internal pressure of the chamber for 50 Torr, the inflow of N 2 gas between 5 and 10 slpm, and an inflow of O 2 gas between 0.1 and 10 slpm.

8. The method of manufacturing a flash memory device of claim 4 , the stabilizing step is performed by setting the internal pressure of the chamber for 50 Torr and the inflow of O 2 gas between 0.1 and 10 slpm.

9. The method of manufacturing a flash memory device of claim 4 , the thermal oxidation step is performed for 0.1 to 10 minutes by setting the internal pressure of the chamber between 30 to 120 Torr, the inflow of N 2 gas between 5 and 10 slpm, and the inflow of O 2 gas between 0.1 and 10 slpm, and the inflow of H 2 gas between 0.1 and 10 slpm.

10. The method of manufacturing a flash memory device of claim 4 , the N 2 -purging step is performed by setting the internal pressure of the chamber for 500 Torr and the inflow of N 2 gas between 0 and 100 slpm.

11. The method of manufacturing a flash memory device of claim 4 , the ramping-down step is performed for 20 to 90 minutes by setting the internal pressure of the chamber for 500 Torr and the inflow of N 2 gas for 10 slpm.

12. The method of manufacturing a flash memory device of claim 4 , the unloading step is performing by setting the internal pressure of the chamber for 50 Torr and an inflow of N 2 gas between 5 and 10 slpm.

13. The method of manufacturing a flash memory device of claim 4 , the first rapid thermal oxidation process additionally has a H 2 -annealing step between the stabilizing step and the thermal oxidation step.

14. The method of manufacturing a flash memory device of claim 4 , the first rapid thermal oxidation process additionally has a H 2 -annealing step between the thermal oxidation step and the N 2 -purging step.

15. The method of manufacturing a flash memory device of claim 13 , the H 2 -annealing step is performed for 0.1 to 2 minutes by setting the internal pressure of the chamber between 30 and 120 Torr and the inflow of H 2 gas between 0.1 and 10 slpm.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2015
From: NUMONYX B. V.
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 036319/0139 →
CHANGE OF NAME Recorded Aug 10, 2015
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 036319/0271 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2006
From: HYNIX SEMICONDUCTOR INC.
To: HYNIX SEMICONDUCTOR INC.; STMICROELECTRONICS S.R.L.
Reel/Frame 018207/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2004
From: LEE, SEUNG CHEOL; PARK, SANG WOOK; SONG, PIL GEUN
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 015103/0099 →