IP Library Granted Patent US 7,023,270
Granted Patent B2
US 7,023,270 · App. 10/905,796 · Granted Apr 4, 2006

High efficiency power amplifier

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Quick Facts
Patent No.
US 7,023,270
App. No.
10/905,796
Granted
Apr 4, 2006
Kind
B2
Abstract

A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in RF applications such as mobile telephones. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units, impedance transformer, and a power stage.

Claims (13)

1. A circuit comprising:

a primary path that includes, in series, a first impedance matching sub-circuit, a power amplifier, and a second impedance matching sub-circuit;

a secondary path, in parallel with the primary path, comprising an impedance transformer; and

a means for coupling a control signal to the power amplifier to selectively enable the primary or secondary path to present a lower impedance respective to the other path;

whereby an inputted signal is always present in both paths and when the primary path is of lower impedance the signal is magnified and when the secondary path is of lower impedance the signal is not magnified.

2. The circuit of claim 1 wherein during signal magnification, the power amplifier consumes more power than when there is no signal magnification.

3. The circuit of claim 1 wherein the signal path through the primary or the secondary path does not pass through a switch device.

4. The circuit of claim 1 wherein the first branch does not include any relay, micromachined switch, transistor switch, PIN diode switch or Schottky diode switch.

5. An integrated circuit comprising the circuit of claim 1 .

6. A wireless transceiver device comprising the circuit as recited in claim 1 .

7. The circuit of claim 1 and further comprising a driver unit that buffers the inputted signal before said signal enters the primary path and secondary path.

8. The circuit of claim 1 and further comprising a third impedance matching sub-circuit that receives the signal from the primary path and secondary path.

9. The circuit of claim 1 wherein the impedance matching sub-circuits and impedance transformer are passive devices.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded Feb 11, 2014
From: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 032239/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 018367/0245 →