IP Library Granted Patent US 7,371,507
Granted Patent B2
US 7,371,507 · App. 10/909,690 · Granted May 13, 2008

Methods for fabricating semiconductor devices

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Quick Facts
Patent No.
US 7,371,507
App. No.
10/909,690
Granted
May 13, 2008
Kind
B2
Abstract

Methods for fabricating semiconductor devices are disclosed. A disclosed method comprises: forming a conductive layer, depositing a interlayer dielectric layer, forming an anti-reflective coating layer on the interlayer dielectric layer, forming a photoresist pattern on the anti-reflection layer, dry-etching the anti-reflective coating layer and the interlayer dielectric layer using the photoresist pattern as a mask and performing an Ar and fluoric plasma treatment to remove a residual layer deposited during the etching of the ARC layer and the ILD.

Claims (26)

1. A method for fabricating a semiconductor device comprising:

forming a conductive layer;

depositing an interlayer dielectric layer on the conductive layer;

forming an anti-reflective coating layer on the interlayer dielectric layer;

forming a photoresist pattern on the anti-reflective coating layer;

dry-etching the anti-reflective coating layer and the interlayer dielectric layer in an etching chamber using the photoresist pattern as a mask to expose a predetermined portion of the conductive layer;

weakening a coherence of a residual layer by performing an Ar plasma treatment using a sputtering effect of the Ar plasma ions in the etching chamber to affect the residual layer deposited during the dry-etching of the anti-reflective coating layer and the interlayer dielectric layer; and

performing a fluoric based plasma treatment comprising C x F x plasma to remove the weakened residual layer, wherein the weakened residual layer is removed by the chemical reaction of an electron with a radical of the C x F x plasma.

2. A method as defined by claim 1 , further comprising forming a via hole for a dual damascene structure in the interlayer dielectric layer.

3. A method as defined by claim 2 , wherein dry-etching the anti-reflective coating layer and the interlayer dielectric layer forms a trench for the dual damascene structure.

4. A method as defined by claim 1 , wherein the Ar plasma treatment and the fluoric based plasma treatment comprise adding O 2 .

5. A method as defined by claim 1 , further comprising removing the photoresist pattern.

6. A method as defined by claim 5 , wherein the residual layer is removed before the photoresist pattern is removed.

7. A method as defined by claim 5 , wherein the residual layer is removed after the photoresist pattern is removed.

8. A method as defined in claim 5 , wherein removing the photoresist pattern is performed in the etching chamber.

9. A method as defined by claim 1 , wherein no wet cleaning is performed to remove the residual layer.

10. The method as defined by claim 1 , wherein the interlayer dielectric layer is etched using the C x F x plasma.

11. A method for fabricating a semiconductor device comprising:

depositing an interlayer dielectric layer on a conductive layer;

forming an anti-reflective coating layer on the interlayer dielectric layer;

forming a photoresist pattern on the anti-reflective coating layer;

dry-etching the anti-reflective coating layer and the interlayer dielectric layer in an etching chamber using the photoresist pattern as a mask to expose a predetermined portion of the conductive layer;

without removing the exposed conductive layer from the etching chamber, weakening a coherence of a residual layer by performing an Ar plasma treatment using a sputtering effect of the Ar plasma ions in the etching chamber to affect the residual layer deposited during the dry-etching of the anti-reflective coating layer and the interlayer dielectric layer;

and performing a fluoric based plasma treatment comprising C x F x plasma to remove the weakened residual layer, wherein the weakened residual layer is removed by the chemical reaction of an electron with a radical of the C x F x plasma.

12. The method as defined by claim 11 , wherein the Ar plasma treatment and the fluoric based plasma treatment comprise adding O 2 .

13. The method as defined by claim 11 , wherein the interlayer dielectric layer is etched using the C x F x plasma.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →