IP Library Granted Patent US 7,160,775
Granted Patent B2
US 7,160,775 · App. 10/912,825 · Granted Jan 9, 2007

Method of discharging a semiconductor device

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Quick Facts
Patent No.
US 7,160,775
App. No.
10/912,825
Granted
Jan 9, 2007
Kind
B2
Abstract

In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming nanoclusters over the hole blocking dielectric layer, forming a charge trapping layer over the nanoclusters, and applying an electric field to the nanoclusters to discharge the semiconductor device. Applying the electric field may occur while applying ultraviolet (UV) light. In one embodiment, the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms.

Claims (19)

1. A method for discharging a semiconductor device comprising:

providing a semiconductor substrate;

forming a hole blocking dielectric layer over the semiconductor substrate, wherein forming the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms;

forming nanoclusters over the hole blocking dielectric layer;

forming a charge trapping layer over the nanoclusters; and

applying an electric field to discharge the semiconductor device, wherein applying the electric field further comprises:

applying the electric field to the nanoclusters to create an electron-hole pair, wherein the electron-hole pair comprises a first electron and a first hole;

tunneling the first electron from one of the nanoclusters through the hole blocking dielectric layer into the semiconductor substrate; and

driving the first hole from one of the nanoclusters into the charge trapping layer, wherein the charge trapping layer comprises a second electron and the first hole combines with the second electron.

2. The method of claim 1 , further comprising forming a dielectric layer over the charge trapping layer.

3. The method of claim 1 , wherein forming the nanoclusters comprises forming nanoclusters covering at least approximately 15 percent of an area of the hole blocking dielectric layer.

4. The method of claim 1 , wherein forming the nanoclusters comprises forming the nanoclusters having an element selected from the group consisting of silicon, germanium, gallium, and arsenic.

5. The method of claim 1 , wherein forming the nanoclusters comprises forming the nanoclusters comprising a material with a band gap less than that of silicon.

6. The method of claim 1 , wherein forming the nanoclusters comprises implanting an element into the nanoclusters.

7. The method of claim 1 , wherein applying the electric field comprises applying ultraviolet (UV) light.

8. The method of claim 1 , wherein forming the hole blocking dielectric layer comprises forming the hole blocking dielectric layer, wherein the hole blocking dielectric layer comprises an electron tunneling dielectric layer.

9. The method of claim 1 , wherein forming the charge trapping layer over the nanoclusters, comprises forming the charge trapping layer over the nanoclusters so that the nanoclusters are within the charge trapping layer.

10. The method of claim 1 , wherein applying the electrical field comprises uniformly erasing the semiconductor device.

11. The method of claim 10 , wherein uniformly erasing comprises applying a voltage that has an absolute value of approximately 10 Volts to approximately 18 Volts.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2004
From: PRINZ, ERWIN J.; MURALIDHAR, RAMACHANDRAN; RAO, RAJESH A.; SADD, MICHAEL A.; STEIMLE, ROBERT A.; SWIFT, CRAIG T.; WHITE, BRUCE E.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015671/0030 →