Prefetching in a data processing system
View Patent ↗A method and apparatus is provided for prefetching in a data processing system ( 10 ). The data processing system ( 10 ) has a bus master ( 14 ) and a memory controller ( 16 ) coupled to a bus ( 12 ). A memory ( 18 ) is coupled to the memory controller ( 16 ). In the data processing system ( 14 ) an address is driven onto the bus ( 12 ). Before the address is qualified, data corresponding to the address is prefetched. Prefetching the data before the address is qualified allows prefetches to be accomplished sooner.
1. A method for prefetching in a data processing system having a bus master, a memory system, and a bus, the bus master and the memory system coupled to the bus, the method comprising:
initiating an access to the memory system, wherein the access requires more than one clock cycle to complete;
determining whether an unqualified address is driven on the bus, wherein the unqualified address is unqualified until accepted by the memory system as taken; and
determining that the unqualified address is driven on the bus but not taken, and in response, prefetching data corresponding to the unqualified address, wherein the prefetching of the data corresponding to the unqualified address is initiated while the access to the memory system is in progress and the prefetching of the data is not related to the access to the memory system.
2. The method of claim 1 , wherein the data processing system includes a memory controller coupled to the bus, and wherein prefetching the data corresponding to the unqualified address comprises:
prefetching the data corresponding to the unqualified address if the data corresponding to the unqualified address is not present in a data buffer of the memory controller.
3. The method of claim 1 , wherein in response to determining that the unqualified address is driven on the bus, the method further comprises:
determining whether the data corresponding to the unqualified address is present within data being fetched in response to the bus access, wherein the prefetching the data corresponding to the unqualified address is performed if the data corresponding to the unqualified address is not present.
4. The method of claim 3 , wherein the data processing system includes a memory controller coupled to the bus, and wherein prefetching the data corresponding to the unqualified address comprises:
prefetching the data corresponding to the unqualified address if the data corresponding to the unqualified address is not present in a data buffer of the memory controller.
5. The method of claim 1 , further comprising:
in response to determining that the unqualified address is not driven on the bus, prefetching data corresponding to an address sequential to an address of the access to the memory system.
6. The method of claim 5 , wherein the data processing system includes a memory controller coupled to the bus, and wherein prefetching data sequential to the access address comprises:
prefetching the data corresponding to the address sequential to the access address if the data corresponding to the address sequential to the access address is not present in a data buffer of the memory controller.
7. The method of claim 5 , wherein the address sequential to the access address is generated based on a width of a data buffer of the memory controller.
8. The method of claim 1 , further comprising:
qualifying an address, wherein the qualifying is performed after initiating the prefetching of the data corresponding to the unqualified address.
9. The method of claim 8 further comprising:
if the qualified address and the unqualified address are a same address, completing the prefetch of the data corresponding to the unqualified address; and
if the qualified address and the unqualified address are not the same address, canceling the prefetch of the data corresponding to the unqualified address.