Semiconductor devices having a via hole and methods for forming a via hole in a semiconductor device
View Patent ↗Semiconductor devices having a via hole and methods for forming a via hole in a semiconductor device are disclosed. A disclosed method comprises performing a first etching process on an insulating layer to form a via hole, and performing a second etching process to enlarge a bottom of the via hole.
1. A method for forming a via hole in a semiconductor device comprising:
forming an etch-stop layer on a metal layer;
forming an insulating layer on the etch-stop layer;
anisotropic etching the insulating layer to form a via hole and expose the etch-stop layer on the metal layer;
isotropic etching the exposed etch-stop layer to expose the metal layer and enlarge a diameter of a lowest part of the via hole to be greater than a diameter of an upper part of the via hole;
depositing a barrier metal layer on the insides of the via hole and on the exposed metal layer; and
at least partially filling the via hole with a metallic material.
2. The method as defined by claim 1 , wherein the etch-stop layer is a TiN layer.