Granted Patent B2

US 7,229,903 · App. 10/925,855 · Granted Jun 12, 2007

Abstract

Claims (32)

1. A method of forming a semiconductor structure comprising:

forming a first semiconductor layer;

forming a second semiconductor layer over the first semiconductor layer;

recessing the second semiconductor layer with respect to the first semiconductor layer;

forming a third semiconductor layer on the second semiconductor layer;

recessing the third semiconductor layer with respect to the second semiconductor layer;

forming a fourth semiconductor layer on the third semiconductor layer;

recessing the fourth semiconductor layer with respect to the third semiconductor layer;

forming a barrier layer coupled to the first semiconductor layer after recessing the fourth semiconductor layer;

forming a first conductive portion coupled to the first semiconductor layer after forming the barrier layer; and

forming a second conductive portion over the first semiconductor layer.

2. The method of claim 1 , further comprising:

patterning the second semiconductor layer to form an opening, wherein a portion of the first conductive portion is within the opening.

3. The method of claim 1 , wherein forming the first conductive portion and the second conductive portion occur simultaneously.

4. The method of claim 1 , wherein forming the first conductive portion occurs after forming the second conductive portion.

5. The method of claim 1 , wherein forming the second conductive portion comprises forming a field plate over the first semiconductor layer.

6. The method of claim 1 , wherein forming the second conductive portion comprises forming the second conductive portion over the second semiconductor layer.

7. The method of claim 1 , wherein forming the second conductive portion comprises physically isolating the second conductive portion from the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.

8. The method of claim 1 , further comprising forming a dielectric over the first semiconductor layer and laterally adjacent the third semiconductor layer.

9. A method of forming a semiconductor structure comprising:

forming a first semiconductor layer;

forming a second semiconductor layer over the first semiconductor layer; recessing the second semiconductor layer with respect to the first semiconductor layer;

forming a third semiconductor layer over the second semiconductor layer;

recessing the third semiconductor layer with respect to the second semiconductor layer;

forming a fourth semiconductor layer over the third semiconductor layer;

recessing the fourth semiconductor layer with respect to the third semiconductor layer;

forming a control electrode coupled to the first semiconductor layer; and

forming a conductive portion over the first semiconductor layer, wherein the conductive portion is different than the control electrode and wherein forming the conductive portion comprises forming a field plate over the first semiconductor layer.

10. The method of claim 9 , further comprising:

patterning the second semiconductor layer to form an opening, wherein a portion of the control electrode is within the opening.

11. The method of claim 9 , wherein forming the control electrode occurs after forming the conductive portion.

12. The method of claim 9 , wherein forming the conductive portion comprises forming the conductive portion over the second semiconductor layer.

Assignments (21)