Differential amplifier circuit
View Patent ↗A differential amplifier circuit has two input transistors, a load element, and a current source. A terminal for an input voltage is connected to a control terminal of a first input transistor. A terminal for a reference voltage is connected to a control terminal of a second input transistor. The two input transistors are connected in parallel between the load element and a terminal of the current source. A terminal for an internal reference potential is connected to a further terminal of the current source. A regulating circuit, is connected to the terminal for the voltage and to the terminal for the reference potential, and regulates the potential of the circuit dependent on changes in the reference voltage. Fluctuations of the reference voltage are compensated by regulation of the internal reference potential. As a result, the operating point of the circuit is stabilized independently of fluctuations of the reference voltage.
1. A differential amplifier circuit, comprising:
a first and second input transistor;
a load element;
a current source;
a terminal for an input voltage, the input voltage terminal connected to a control terminal of the first input transistor;
a terminal for a reference voltage, the reference voltage terminal connected to a control terminal of the second input transistor, the input transistors being connected in parallel between the load element and a terminal of the current source;
a terminal for an internal reference potential, the internal reference potential terminal connected to a further terminal of the current source; and
a regulating circuit having a control voltage source for generating a control voltage, the regulating circuit being connected to the terminal for the reference voltage and to the terminal for the internal reference potential,
the regulating circuit regulating the internal reference potential in a manner dependent on fluctuations of the reference voltage such that the internal reference potential is less than the reference voltage by a magnitude of the control voltage.
2. The differential amplifier circuit as claimed in claim 1 , wherein the regulating circuit includes a regulating amplifier having a first input, a second input, and an output,
the control voltage source is connected between the first input of the regulating amplifier and the terminal of the reference voltage, and
the second input of the regulating amplifier is connected to the terminal of the internal reference potential.
3. The differential amplifier circuit as claimed in claim 2 , wherein the regulating circuit has a series transistor,
the output of the regulating amplifier is connected to a control input of the series transistor, and
the series transistor is connected between a terminal for a supply potential and the terminal for the internal reference potential.
4. The differential amplifier circuit as claimed in claim 3 , wherein the first input of the regulating amplifier is an inverting input, and the second input of the regulating amplifier is a noninverting input.
5. The differential amplifier circuit as claimed in claim 2 , wherein the regulating circuit has a voltage generator circuit for generating the internal reference potential,
the output of the regulating amplifier is connected to a control input of the voltage generator circuit, and
the voltage generator circuit is connected between a terminal for a supply potential and the terminal for the internal reference potential.
6. The differential amplifier circuit as claimed in claim 5 , wherein the voltage generator circuit has a charge pump.
7. The differential amplifier circuit as claimed in claim 6 , wherein the supply potential is formed as a negative potential and the charge pump generates a negative internal reference potential.
8. The differential amplifier circuit as claimed in claim 5 , wherein the first input of the regulating amplifier is a noninverting input, and the second input of the regulating amplifier is an inverting input.
9. The differential amplifier circuit as claimed in claim 1 , wherein the current source is formed as a current mirror having an input path and an output path, the output path being connected between the terminal for the internal reference potential and the input transistors.