IP Library Granted Patent US 7,500,131
Granted Patent B2
US 7,500,131 · App. 10/935,902 · Granted Mar 3, 2009

Training pattern based de-skew mechanism and frame alignment

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Quick Facts
Patent No.
US 7,500,131
App. No.
10/935,902
Granted
Mar 3, 2009
Kind
B2
Abstract

Some embodiments of the invention provide a training sequence that may be used in a deskewing process or a protocol to be implemented in a training sequence deskew. Embodiments may also comprise a training pattern that allows for header or frame alignment.

Claims (54)

1. A training sequence based deskew method comprising:

receiving a repeating training sequence on each of a plurality of lanes;

detecting a header in the training sequence on each of the plurality of lanes;

waiting a specified time after detecting a header on each of the plurality of lanes;

asserting a deskew enable signal;

in response to the deskew enable signal, measuring a timing difference between headers in a subsequent training sequence on each of the plurality of lanes; and

deskewing lanes based on the timing difference for each of the plurality of lanes.

2. The method of claim 1 wherein the training sequence is dedicated to the deskew operation.

3. The method of claim 1 wherein the specified time after detecting a header on each of the plurality of lanes is equal to a multiple of an amount of time between the first header detected and a last header detected.

4. The method of claim 3 wherein the multiple is two.

5. The method of claim 1 wherein the specified time after detecting a header on each of the plurality of lanes is determined by a maximum possible skew.

6. The method of claim 1 wherein the training sequence repeats until associated training functions are completed.

7. The method of claim 1 wherein the training sequence contains information for something other than deskewing.

8. The method of claim 1 , wherein receiving the repeating training sequence comprises:

receiving a first series of bits, and

receiving a second series of bits after receiving the first series of bits, without intervening bits between the first series and the second series, the second series of bits the same as the first series of bits.

9. An apparatus comprising a tangible machine-readable medium containing instructions that, when executed, cause a machine to:

receive a repeating training sequence on each of a plurality of lanes;

detect a header in the training sequence on each of the plurality of lanes;

wait a specified time after detecting a header on each of the plurality of lanes;

asserting a deskew enable signal after the specified time has elapsed;

measure a timing difference between headers in a subsequent training sequence on each of the plurality of lanes; and

deskew lanes based on the timing difference for each of the plurality of lanes.

10. The apparatus of claim 9 wherein the training sequence is dedicated to the deskew operation.

11. The apparatus of claim 9 wherein the specified time after detecting a header on each of the plurality of lanes is equal to a multiple of the an amount of time between a first header detected and a last header detected.

12. The apparatus of claim 11 wherein the multiple is two.

13. The apparatus of claim 9 wherein the specified time after detecting a header on each of the plurality of lanes is determined by a maximum possible skew.

14. The apparatus of claim 9 wherein the training sequence repeats until associated training functions are completed.

15. The apparatus of claim 9 wherein the training sequence contains information for something other than deskewing.

16. An apparatus comprising:

a link comprising a plurality of lanes, the link to receive a repeating training sequence on each of the plurality of lanes, the training sequence to include a header; and

a circuit coupled with the link, the circuit to:

wait a specified time after detecting a header on each of the plurality of lanes and assert a deskew enable signal;

in response to the deskew enable signal measure a timing difference between headers in a subsequent training sequence on each of the plurality of lanes; and

deskew lanes based on the timing difference for each of the plurality of lanes.

17. The apparatus of claim 16 , wherein the training sequence is dedicated to the deskew operation.

18. The apparatus of claim 16 , wherein the training sequence further comprises a unique pattern.

19. A system comprising:

a link comprising a plurality of lanes;

a host controller coupled with the link; and

a remote device coupled with the link, the remote device to:

wait a specified time after detecting a header on each of the plurality of lanes and assert a deskew enable signal;

in response to the deskew enable signal, measure a timing difference between headers in subsequent training sequences on each of the plurality of lanes; and

deskew signals on the plurality of lanes based on the timing difference.

20. The system of claim 19 , further comprising a training sequence dedicated to a deskew operation.

21. The system of claim 20 , wherein the training sequence comprises a unique pattern.

22. A host controller comprising:

a link including a plurality of lanes; and

a circuit coupled with the link, the circuit to generate a signal to send over the plurality of lanes to a remote device, the remote device to deskew the plurality of lanes, the remote device configured to:

wait a specified time after detecting a header on each of the plurality of lanes and assert a deskew enable signal;

in response to the deskew enable signal measure a timing difference between headers in a training sequence on each of the plurality of lanes; and

deskew lanes based on the timing difference for each of the plurality of lanes.

23. The system of claim 22 , wherein the signal is in response to a plurality of signals from a remote device, and the plurality of signals are timing signals.

24. The system of claim 23 , wherein the timing signals are in response to a repeating training sequence sent out by the circuit.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 4, 2013
From: INTEL CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030747/0001 →