IP Library Granted Patent US 7,105,408
Granted Patent B2
US 7,105,408 · App. 10/948,884 · Granted Sep 12, 2006

Phase change memory with a select device having a breakdown layer

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Quick Facts
Patent No.
US 7,105,408
App. No.
10/948,884
Granted
Sep 12, 2006
Kind
B2
Abstract

A select device may have its threshold current reduced relative to the threshold current of a phase change memory element by providing within the select device a breakdown layer. Because the breakdown layer forms a breakdown filament along its length, the relative area between layers may be reduced, reducing the threshold current of the select device relative to that of the memory element. In addition, a stack may be formed with the select device over the memory element. The select device may be arranged so that the position of the breakdown filament may be moved inwardly relative to the etched edge to also reduce leakage current. In one embodiment, sidewall spacers may be formed on a portion of the select device.

Claims (47)

1. A method comprising:

providing a phase change memory including a select device and a memory element;

forming said select device of an upper conductive material, a switching material, and a lower conductive material;

forming said switching material of a material that is not programmable; and

providing a dielectric breakdown layer within said select device.

2. The method of claim 1 including forming said breakdown layer between said upper conductive material and said switching material.

3. The method of claim 1 including forming said breakdown layer between said lower conductive material and said switching material.

4. The method of claim 1 including forming said upper conductive material to have a smaller lateral extent than said switching material.

5. The method of claim 4 including providing sidewall spacers on the side of said upper conductive material.

6. The method of claim 1 including forming said breakdown layer of a material that adheres to a layer in contact with said breakdown layer.

7. The method of claim 6 including forming said breakdown layer of Al 2 O 3 .

8. The method of claim 1 including forming a stack including said select device over said memory element.

9. The method of claim 8 including forming said memory element beneath said select device.

10. A phase change memory comprising:

a phase change memory element including a chalcogenide; and

a select device for said memory element, said select device including a breakdown layer, wherein said select device includes an upper conductive material, a switching material, and a lower conductive material, and wherein said switching material is not programmable.

11. The memory of claim 10 wherein said breakdown layer is a dielectric.

12. The memory of claim 11 wherein said breakdown layer includes Al 2 O 3 .

13. The memory of claim 10 wherein said switching material is a chalcogenide.

14. The memory of claim 10 wherein said breakdown layer is between said upper conductive material and said switching material.

15. The memory of claim 10 wherein said breakdown layer is between said lower conductive material and said switching material.

16. The memory of claim 10 wherein said upper conductive material has a smaller lateral extent than said switching material.

17. The memory of claim 16 including sidewall spacers on the side of said upper conductive material.

18. The memory of claim 10 wherein said phase change memory element and said select device are formed as a stack having a common etched edge.

19. The memory of claim 18 wherein said memory element is below said select device.

20. The memory of claim 19 wherein said select device includes an upper conductive material, a switching material, and a lower conductive material and said upper conductive material has a smaller lateral extent than said lower conductive material.

21. A system comprising:

a processor;

a static random access memory coupled to said processor; and

a memory including a phase change memory element having a chalcogenide and a select device for said memory element, said select device including a breakdown layer, wherein said select device includes an upper conductive material, a switching material, and a lower conductive material and said upper conductive material has a smaller lateral extent than said lower conductive material.

22. The system of claim 21 wherein said breakdown layer is a dielectric.

23. The system of claim 21 wherein said breakdown layer includes Al 2 O 3 .

24. The system of claim 21 wherein said select device includes a chalcogenide material.

25. The system of claim 21 including sidewall spacers on said upper conductive material.

26. A phase change memory comprising:

a phase change memory element including a chalcogenide; and

a select device for said memory element, said select device including a breakdown layer, wherein said select device includes an upper conductive material, a switching material, and a lower conductive material and said upper conductive material has a smaller lateral extent than said switching material.

27. The memory of claim 26 wherein said breakdown layer is a dielectric.

28. The memory of claim 27 wherein said breakdown layer includes Al 2 O 3 .

29. The memory of claim 26 wherein said switching material is not programmable.

30. The memory of claim 29 wherein said switching material is a chalcogenide.

31. The memory of claim 26 wherein said breakdown layer is between said upper conductive material and said switching material.

32. The memory of claim 26 wherein said breakdown layer is between said lower conductive material and said switching material.

33. The memory of claim 26 including sidewall spacers on the side of said upper conductive material.

34. The memory of claim 26 wherein said phase change memory element and said select device are formed as a stack having a common etched edge.

35. The memory of claim 32 wherein said memory element is below said select device.

36. The memory of claim 35 wherein said select device includes an upper conductive material, a switching material, and a lower conductive material and said upper conductive material has a smaller lateral extent than said lower conductive material.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2012
From: INTEL CORPORATION
To: NUMONYX B.V.
Reel/Frame 028055/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027075/0682 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2004
From: DENISON, CHARLES H.
To: INTEL CORPORATION
Reel/Frame 015834/0118 →