IP Library Granted Patent US 7,169,678
Granted Patent B2
US 7,169,678 · App. 10/950,017 · Granted Jan 30, 2007

Method of forming a semiconductor device using a silicide etching mask

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Quick Facts
Patent No.
US 7,169,678
App. No.
10/950,017
Granted
Jan 30, 2007
Kind
B2
Abstract

Semiconductor devices and methods for fabricating a silicide of a semiconductor device are disclosed. An illustrated method comprises: forming a gate electrode; depositing an insulating layer; removing a predetermined portion of the insulating layer in order to expose a portion of the gate electrode; forming silicide on the exposed portion of the gate electrode; and etching the insulating layer while using the silicide as an etching mask.

Claims (14)

1. A method to fabricate a silicide of a semiconductor device comprising:

forming a gate electrode;

depositing an insulating layer on the gate electrode;

removing a predetermined portion of the insulating layer in order to expose a top surface and a portion of the sidewalls of the gate electrode;

forming silicide on the exposed top surface and portion of the sidewalls of the gate electrode; and

etching the insulating layer while using the silicide as an etching mask.

2. The method as defined by claim 1 , wherein the insulating layer comprises an oxide material.

3. The method as defined by claim 1 , wherein the predetermined portion of the insulating layer is removed by performing a CMP process.

4. The method as defined by claim 1 , wherein the predetermined portion of the insulating layer is removed by etching without using an etching mask.

5. The method as defined by claim 1 , wherein forming a silicide comprises: depositing a silicide formation material on the gate electrode; forming silicide through an annealing process; and removing unreacted silicide material.

6. The method as defined by claim 5 , wherein the silicide formation material comprises a material selected from transition elements or an alloy of transition elements.

7. The method as defined by claim 5 , wherein the silicide formation material comprises a material selected from the group comprising: tungsten, titanium, tantalum, cobalt, nickel and hafnium.

8. The method as defined by claim 1 , wherein etching the insulating layer forms at least one spacer under the silicide and on the sidewall of the gate electrode.

9. The method as defined by claim 8 , wherein the spacer is formed lower than the gate electrode.

Assignments (3)
CHANGE OF NAME Recorded Jun 6, 2006
From: DONGBU ANAM SEMICONDUCTORS, INC
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017718/0964 →
MERGER Recorded May 31, 2005
From: DONGBU SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 016593/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2004
From: KIM, SEOK SU
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 015836/0689 →