IP Library Granted Patent US 7,193,476
Granted Patent B2
US 7,193,476 · App. 10/963,558 · Granted Mar 20, 2007

Integrated circuit

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Quick Facts
Patent No.
US 7,193,476
App. No.
10/963,558
Granted
Mar 20, 2007
Kind
B2
Abstract

An integrated circuit includes a high-frequency power amplifier and a matching circuit. The high-frequency power amplifier has at least one stage of an amplifier element. The matching circuit has a MOSFET and a detector diode. The source of the MOSFET is connected to an input of a first stage amplifier element, the drain is connected to a ground, and the gate is also connected to the ground. A capacitor is connected between the gate of the MOSFET and the ground. The detector diode is connected in parallel between the drain and the gate of the MOSFET. Turning on the MOSFET reduces the effective gain of the first stage amplifier element, thereby allowing mode change.

Claims (39)

1. An integrated circuit including a high-frequency power amplifier including at least one stage of an amplifier element, comprising:

a matching circuit, the matching circuit comprising:

a metal oxide semiconductor field effect transistor (MOSFET) with a source connected to an input of the amplifier element, a drain connected to a ground, and a gate connected to the ground;

a capacitor connected between the gate of the MOSFET and the ground; and

a detector diode connected in parallel between the drain and the gate of the MOSFET.

2. The integrated circuit according to claim 1 , wherein the MOSFET is a P-channel MOSFET.

3. The integrated circuit according to claim 1 , further comprising:

a first resistor connected between the drain of the MOSFET and the ground; and

a second resistor connected in parallel with the capacitor.

4. The integrated circuit according to claim 1 , wherein an anode of the detector diode is connected to the drain of the MOSFET, and a cathode of the detector diode is connected to the gate of the MOSFET.

5. The integrated circuit according to claim 1 , wherein the high-frequency power amplifier is used in a mobile phone capable of switching a first mode and a second mode providing higher gain than the first mode.

6. The integrated circuit according to claim 5 , wherein the first mode is an Enhanced Data GSM Environment (EDGE) mode, and the second mode is a Global System for Mobile (OSM) mode.

7. The integrated circuit according to claim 1 , wherein the high-frequency power amplifier is packaged in a multi-chip module.

8. An integrated circuit including a high-frequency power amplifier including at least two stages of amplifier elements, comprising:

a matching circuit, the matching circuit comprising:

a metal oxide semiconductor field effect transistor (MOSFET) with a source connected to an output of a previous-stage amplifier element, a drain connected to a ground, and a gate connected to the ground;

a capacitor connected between the gate of the MOSFET and the ground; and

a detector diode connected in parallel between the drain and the gate of the MOSFET.

9. The integrated circuit according to claim 8 , wherein the MOSFET is a P-channel MOSFET.

10. The integrated circuit according to claim 8 , further comprising:

a first resistor connected between the drain of the MOSFET and the ground; and

a second resistor connected in parallel with the capacitor.

11. The integrated circuit according to claim 8 , wherein an anode of the detector diode is connected to the drain of the MOSFET, and a cathode of the detector diode is connected to the gate of the MOSFET.

12. The integrated circuit according to claim 8 , wherein the high-frequency power amplifier is used in a mobile phone capable of switching a first mode and a second mode providing higher gain than the first mode.

13. The integrated circuit according to claim 12 , wherein the first mode is an Enhanced Data GSM Environment (EDGE) mode, and the second mode is a Global System for Mobile (GSM) mode.

14. The integrated circuit according to claim 8 , wherein the high-frequency power amplifier is packaged in a multi-chip module.

15. An integrated circuit including:

a high-frequency power amplifier including at least one stage of an amplifier element and a matching circuit connected to an input of the amplifier element,

said matching circuit connected to receive an input RF signal, wherein the matching circuit controls attenuation of said received input RF signal in response to a signal level of the input RF signal and feeds same to input of the amplifier element; and

wherein said matching element includes:

a detector element detecting if an RF signal at the input end or the output end of the amplifier element exceeds a predetermined level, and

an element switched on or off by the detector element.

16. The integrated circuit according to claim 15 , wherein the matching circuit attenuates said received input RF signal at a first level if the signal level of the input RF signal is lower than a predetermined value, and attenuates the received RF signal at a second level if the signal level of the input RF signal is equal to or higher than the predetermined value.

17. An integrated circuit including a high-frequency power amplifier including at least one stage of an amplifier element, comprising:

a matching circuit connected to an input end or an output end of the amplifier element, the matching circuit comprising

a detector element detecting if an RF signal at the input end or the output end of the amplifier element exceeds a predetermined level, and

an element switched on or off by the detector element.

18. The integrated circuit as recited in claim 17 wherein when said element is switched on, said integrated circuit is operative for feeding an input signal to said at least one stage for amplifying said input signal at a first gain when the input signal is below a predetermined level sufficient to place said element in one of an on or off state, and said integrated circuit is operative for feeding said input signal to said at least one stage for amplifying said input signal at a second gain when the input signal is equal to or above said predetermined level sufficient to place said element in the other of said on or off state.

19. The integrated circuit as recited in claim 15 wherein said first level is positive and corresponds to attenuating said received input RF signal, and said second level is zero and corresponds to not attenuating said received input RF signal.

Assignments (3)
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0840 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2006
From: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017700/0810 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2004
From: HONDA, TAKANORI
To: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
Reel/Frame 015343/0963 →