IP Library Granted Patent US 7,015,153
Granted Patent B1
US 7,015,153 · App. 10/969,634 · Granted Mar 21, 2006

Method for forming a layer using a purging gas in a semiconductor process

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Quick Facts
Patent No.
US 7,015,153
App. No.
10/969,634
Granted
Mar 21, 2006
Kind
B1
Abstract

A method for forming at least a portion of a semiconductor device includes providing a semiconductor substrate, flowing a first precursor gas over the substrate to form a first metal-containing layer overlying the semiconductor substrate, and after completing said step of flowing the first precursor gas, flowing a first deuterium-containing purging gas over the first metal-containing layer to incorporate deuterium into the first metal-containing layer and to also purge the first precursor gas. The method may further include flowing a second precursor gas over the first metal-containing layer to react with the first metal-containing layer to form a metal compound-containing layer, and flowing a second deuterium-containing purging gas over the metal compound-containing layer to incorporate deuterium into the metal compound-containing layer and to also purge the second precursor gas.

Claims (34)

1. A method for forming at least a portion of a semiconductor device, comprising:

providing a semiconductor substrate;

flowing a first precursor gas over the substrate to form a first metal-containing layer overlying the semiconductor substrate; and

after completing said step of flowing the first precursor gas, flowing a first deuterium-containing purging gas over the first metal-containing layer to incorporate deuterium into the first metal-containing layer and to also purge the first precursor gas.

2. A method as in claim 1 , wherein the first deuterium-containing purging gas comprises at least one of nitrogen, argon, or helium.

3. A method as in claim 1 , wherein the first deuterium-containing purging gas comprises hydrogen.

4. A method as in claim 1 , wherein the first deuterium-containing purging gas comprises plasma.

5. A method as in claim 1 , wherein the first precursor gas comprises at least one of hafnium, zirconium, silicon, lanthanum, titanium, tantalum, molybdenum, iridium, tungsten, or ruthenium.

6. A method as in claim 1 , further comprising:

flowing a second precursor gas over the first metal-containing layer to react with the first metal-containing layer to form a metal compound-containing layer; and

flowing a second deuterium-containing purging gas over the metal compound-containing layer to incorporate deuterium into the metal compound-containing layer and to also purge the second precursor gas.

7. A method as in claim 6 , wherein the first deuterium-containing purging gas and the second deuterium-containing purging gas are a same gas.

8. A method as in claim 6 , wherein the second deuterium-containing purging gas comprises at least one of nitrogen, argon, or helium.

9. A method as in claim 6 , wherein the second deuterium-containing purging gas comprises plasma.

10. A method as in claim 6 , wherein the second precursor gas comprises at least one of deuterium oxide, deuterium peroxide, hydrogen oxide, hydrogen peroxide, ozone, methane, deuterated methane, ammonia, or deuterated ammonia.

11. A method as in claim 1 , wherein the first metal-containing layer is conductive.

12. A method as in claim 1 , wherein the first metal-containing layer is non-conductive.

13. A method as in claim 12 , wherein the first metal-containing layer comprises a dielectric having a dielectric constant greater than 4.

14. A method as in claim 12 , further comprising:

before said step of flowing a first precursor gas, forming an interfacial layer between the substrate and the first metal-containing layer.

15. A method as in claim 14 , wherein the interfacial layer is non-conductive and comprises at least one of an oxide or a nitride.

16. A method for forming at least a portion of a semiconductor device, comprising:

providing a semiconductor substrate;

flowing a first precursor gas over the substrate to form a first metal-containing layer on the semiconductor substrate;

flowing a first deuterium-containing purging gas over the first metal-containing layer to incorporate deuterium into the first metal-containing layer and to also purge the first precursor gas;

flowing a second precursor gas over the first metal-containing layer to react with the first metal-containing layer to form a metal compound-containing layer; and

flowing a second deuterium-containing purging gas over the metal compound-containing layer to incorporate deuterium into the metal compound-containing layer and to also purge the second precursor gas.

17. A method as in claim 16 , wherein each step is repeated at least once.

18. At least a portion of a semiconductor device, comprising:

a semiconductor substrate; and

a metal compound-containing layer overlying the semiconductor substrate,

wherein a minimum concentration of deuterium in the metal compound-containing layer is greater than 1.7×10 20 atoms/cm 3 .

19. At least the portion of the semiconductor device as in claim 18 , further comprising:

an interfacial layer between the substrate and the metal compound-containing layer, wherein a minimum concentration of deuterium in the interfacial layer is greater than 2.6×10 20 atoms/cm 3 .

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2004
From: TRIYOSO, DINA H.; ADETUTU, OLUBUNMI O.; GILMER, DAVID C.; ROAN, DARRELL; SCHAEFFER, JAMES K.; TOBIN, PHILIP J.; TSENG, HSING H.
To: FREESCALE SEMICONDUCTOR, INC.
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