IP Library Granted Patent US 7,374,654
Granted Patent B1
US 7,374,654 · App. 10/978,845 · Granted May 20, 2008

Method of making an organic memory cell

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Quick Facts
Patent No.
US 7,374,654
App. No.
10/978,845
Granted
May 20, 2008
Kind
B1
Abstract

A method of making an organic memory cell which comprises two electrodes with a controllably conductive media between the two electrodes is disclosed. The present invention involves providing a dielectric layer having formed therein one or more first electrode pads; removing a portion of the first electrode pad to form a recessed area on top of the pads and in the dielectric layer using reverse electroplating; forming a controllably conductive media over the first electrode pad in the recessed area; and forming a second electrode over the conductive media. The controllably conductive media contains an organic semiconductor layer and a passive layer.

Claims (31)

1. A method of making an organic memory cell comprising:

providing a dielectric layer having formed therein one or more first electrode pads;

removing a portion of the first electrode pad to form a recessed area on top of the first electrode pad and in the dielectric layer using reverse electroplating;

forming a controllably conductive media comprising an organic semiconductor material and a passive layer over the electrode pad and in the recessed area; and

providing a second electrode over the controllably conductive media.

2. The method of claim 1 , wherein the reverse electroplating is performed using phosphoric acid electrolytes, nitric acid electrolytes, or organic acid electrolytes.

3. The method of claim 1 , further comprising forming a mask over portions of the dielectric layer before removing the portion of the first electrode pad.

4. The method of claim 1 , further comprising forming a mask over portions of the dielectric layer after removing the portion of the first electrode pad.

5. The method of claim 1 , wherein the recessed area on top of the first electrode pads in the dielectric layer has a depth of about 0.01 μm or more and about 25 μm or less.

6. The method of claim 1 , wherein the organic semiconductor material comprises at least one selected from the group consisting of polyacetylene; polydiphenylacetylene; poly(t-butyl)diphenylacetylene; poly(trifluoromethyl)diphenylacetylene; polybis(trifluoromethyl)acetylene; polybis(t-butyldiphenyl)acetylene; poly(trimethylsilyl) diphenylacetylene; poly(carbazole)diphenylacetylene; polydiacetylene; polyphenylacetylene; polypyridineacetylene; polymethoxyphenylacetylene; polymethylphenylacetylene; poly(t-butyl)phenylacetylene; polynitro-phenylacetylene; poly(trifluoromethyl)phenylacetylene; poly(trimethylsilyl)pheylacetylene; polydipyrrylmethane; polyindoqiunone; polydihydroxyindole; polytrihydroxyindole; furane-polydihydroxyindole; polyindoqiunone-2-carboxyl; polyindoqiunone; polybenzobisthiazole; poly(p-phenylene sulfide); polyaniline; polythiophene; polypyrrole; polysilane; polystyrene; polyfuran; polyindole; polyazulene; polyphenylene; polypyridine; polybipyridine; polyphthalocyanine; polysexithiofene; poly(siliconoxohemiporphyrazine); poly(germaniumoxohemiporphyrazine); poly(ethylenedioxythiophene); polymetallocene complexes; and polypyridine metal complexes.

7. The method of claim 1 , wherein the first electrode and second electrode independently comprise at least one selected from the group consisting of aluminum, chromium, copper, germanium, gold, magnesium, manganese, indium, iron, nickel, palladium, platinum, silver, titanium, zinc, and alloys thereof; indium-tin oxide; and metal silicides.

8. The method of claim 1 , wherein the organic semiconductor layer has a thickness of about 0.001 μm or more and about 5 μm or less and the passive layer has a thickness of about 2 Å or more and about 0.1 μm or less.

9. The method of claim 1 , wherein the second electrode is formed in the recessed area in the dielectric layer.

10. A method of making an organic memory cell comprising:

providing a dielectric layer having formed therein one or more first electrode pads, at least one of the first electrode pads comprising at least copper;

removing a portion of the pad to form a recessed area on top of the first electrode pad and in the dielectric layer using reverse electroplating;

forming a copper sulfide region over the first electrode pad and in the recessed area;

forming an organic semiconductor layer over the copper sulfide region in the recessed area, the organic semiconductor layer comprising at least one of a conjugated organic polymer, a conjugated organometallic compound, a conjugated organometallic polymer, a buckyball, and a carbon nanotube; and

forming a second electrode over the organic semiconductor layer.

11. The method of claim 10 , wherein forming a copper sulfide region is performed by contacting a sulfide compound with the first electrode.

12. The method of claim 11 , wherein the sulfide compound is contacted with the first electrode for a time from about 1 second to about 3 minutes at a temperature from about 150° C. to about 500° C.

13. The method of claim 10 , wherein the reverse electroplating is performed using phosphoric acid electrolytes, nitric acid electrolytes, or organic acid electrolytes.

14. The method of claim 10 , further comprising forming a mask over portions of the dielectric layer before removing the portion of the first electrode pad.

15. The method of claim 10 , further comprising forming a mask over portions of the dielectric layer after removing the portion of the first electrode pad.

16. The method of claim 10 , wherein the recessed area on top of the first electrode pads in the dielectric layer has a depth of about 0.01 μm or more and about 25 μm or less.

17. The method of claim 10 , wherein the organic semiconductor layer comprises at least one selected from the group consisting of polyacetylene; polydiphenylacetylene; poly(t-butyl)diphenylacetylene; poly(trifluoromethyl)diphenylacetylene; polybis(trifluoromethyl)acetylene; polybis(t-butyldiphenyl)acetylene; poly(trimethylsilyl) diphenylacetylene; poly(carbazole)diphenylacetylene; polydiacetylene; polyphenylacetylene; polypyridineacetylene; polymethoxyphenylacetylene; polymethylphenylacetylene; poly(t-butyl)phenylacetylene; polynitro-phenylacetylene; poly(trifluoromethyl)phenylacetylene;

poly(trimethylsilyl)pheylacetylene; polydipyrrylmethane;

polyindoqiunone; polydihydroxyindole; polytrihydroxyindole; furane-polydihydroxyindole; polyindoqiunone-2-carboxyl; polyindoqiunone; polybenzobisthiazole; poly(p-phenylene sulfide); polyaniline; polythiophene; polypyrrole; polysilane; polystyrene; polyfuran; polyindole; polyazulene; polyphenylene; polypyridine; polybipyridine; polyphthalocyanine; polysexithiofene; poly(siliconoxohemiporphyrazine); poly(germaniumoxohemiporphyrazine); poly(ethylenedioxythiophene); polymetallocene complexes; and polypyridine metal complexes.

18. The method of claim 10 , wherein the second electrode and second electrode independently comprise at least one selected from the group consisting of aluminum, chromium, copper, germanium, gold, magnesium, manganese, indium, iron, nickel, palladium, platinum, silver, titanium, zinc, and alloys thereof; indium-tin oxide; and metal silicides.

19. The method of claim 10 , wherein the organic semiconductor layer has a thickness of about 0.001 μm or more and about 5 μm or less and the passive layer has a thickness of about 2 Å or more and about 0.1 μm or less.

20. The method of claim 10 , wherein the second electrode is formed in the recessed area in the dielectric layer.

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036037/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2007
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 019052/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019029/0976 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2004
From: CHANG, MARK S.; LOPATIN, SERGEY D.; SUBRAMANIAN, RAMKUMAR
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 016039/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2004
From: CHANG, MARK S.; LOPATIN, SERGEY D.; SUBRAMANIAN, RAMKUMAR
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 015952/0912 →