IP Library Granted Patent US 7,140,767
Granted Patent B2
US 7,140,767 · App. 10/979,437 · Granted Nov 28, 2006

Programmable ideality factor compensation in temperature sensors

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Quick Facts
Patent No.
US 7,140,767
App. No.
10/979,437
Granted
Nov 28, 2006
Kind
B2
Abstract

A temperature sensor circuit and system providing accurate readings using a temperature diode whose ideality factor may fall within a determined range. In one set of embodiments a change in diode junction voltage (ΔV BE ) proportional to the temperature of the diode is captured and provided to an ADC, which may perform required signal conditioning functions on ΔV BE , and provide a numeric value output corresponding to the temperature of the diode. Errors in the measured temperature that might result from using diodes with ideality factors that differ from an expected ideality factor may be eliminated by programming the system to account for differing ideality factors. The gain of the temperature sensor may be matched to the ideality factor of the temperature diode by using an accurate, highly temperature stable reference voltage of the ADC to set the gain of the temperature measurement system. The reference voltage may have a trim capability to change the gain setting voltage by a digital address comprising a determined number of bits, with the programmable range for the reference voltage corresponding to a determined range of ideality factors.

Claims (80)

1. A method for monitoring temperature, the method comprising:

adjusting an operating characteristic of an ADC;

applying one or more input signals to a device coupled to the ADC, the device having a substantially defined ideality factor and a substantially defined generally non-linear input-output characteristic that varies with temperature, the device producing a sequence of output signals in response to the one or more input signals, wherein each one of the sequence of output signals is generated in response to a respective one of the one or more input signals;

generating a numeric value corresponding to a temperature of the device in response to the sequence of output signals;

wherein for a specified range of ideality factors, said adjusting results in the numeric value being substantially free of errors introduced by the ideality factor of the device not matching an expected ideality factor of the specified range of ideality factors.

2. The method of claim 1 , wherein the operating characteristic is a reference voltage.

3. The method of claim 1 , wherein the ADC is one of:

a delta-sigma ADC;

a cyclic ADC;

a pipeline ADC;

a successive approximation ADC; and

an integrating ADC.

4. The method of claim 1 , wherein said generating and outputting the numeric value is performed by the ADC.

5. The method of claim 1 , wherein said adjusting is performed in response to receiving an ideality factor value corresponding to the operating characteristic.

6. The method of claim 5 , wherein the ideality factor value is user programmable during system operation.

7. The method of claim 1 , wherein the device comprises a PN-junction.

8. The method of claim 7 , wherein the device is one of:

a diode; and

a BJT.

9. The method of claim 8 , wherein each one of the one or more input signals is an input current, and each one of the sequence of output signals is a base-emitter voltage of the PN-junction.

10. The method of claim 9 , wherein each input current is generated by one of a determined number of current sources.

11. A temperature monitoring system comprising:

an analog-to-digital converter (ADC) configured to receive a reference voltage;

a semiconductor device coupled to the ADC, wherein the semiconductor device has a substantially defined generally non-linear input-output characteristic that varies with temperature, and wherein the semiconductor device also has a substantially defined ideality factor; and

one or more input devices;

wherein the semiconductor device is operable to receive one or more input signals from the one or more input devices, each input signal generated by a respective one of the one or more input devices;

wherein the semiconductor device is further operable to generate a sequence of output signals and provide the sequence of output signals to the ADC, wherein each one of the sequence of output signals is generated in response to a respective one of the one or more input signals;

wherein the ADC is operable to produce a numeric value corresponding to a temperature of the semiconductor device, according to the sequence of output signals; and

wherein for a specified range of ideality factors, the reference voltage is operable to be adjusted such that the numeric value is substantially free of errors introduced by the ideality factor of the semiconductor device not matching an expected ideality factor of the specified range of ideality factors.

12. The system of claim 11 , wherein the one or more of input devices comprise one or more current sources, and the input signals comprise input currents.

13. The system of claim 11 , wherein the ADC is one of:

a pipeline ADC;

a cyclic ADC;

a delta-sigma ADC;

a successive approximation ADC; and

an integrating ADC.

14. The system of claim 11 , wherein the ADC comprises an integrating sample-and-hold circuit.

15. The system of claim 11 , wherein the semiconductor device comprises a PN-junction.

16. The system of claim 15 , wherein the output signal comprises a base-emitter voltage developed across the PN-junction.

17. The system of claim 15 , wherein the PN-junction is comprised in one of:

a diode; and

a bipolar junction transistor (BJT).

18. The system of claim 11 further comprising a bandgap reference circuit coupled to the ADC, wherein the bandgap reference circuit is configured to provide the reference voltage to the ADC.

19. The system of claim 18 further comprising an ideality factor register coupled to the bandgap reference circuit, wherein the ideality factor register is configured to hold an ideality factor value, and wherein the bandgap reference circuit is operable to adjust the reference voltage based on the ideality factor value.

20. The system of claim 19 further comprising a bus interface coupled to the ideality factor register, wherein the bus interface is operable to couple to a controller, and wherein the ideality factor register is configured to receive the ideality factor value via the bus interface.

21. The system of claim 19 , wherein the ideality factor register is user programmable during system operation.

22. A temperature monitoring system comprising:

one or more input devices configured to generate one or more input signals, each input signal generated by a respective one of the one or more input devices;

a semiconductor device, wherein the semiconductor device has a substantially defined generally non-linear input-output characteristic that varies with temperature, and wherein the semiconductor device also has a substantially defined ideality factor, wherein the semiconductor device is operable to receive the one or more input signals and generate a corresponding sequence of output signals therefrom;

an analog-to-digital converter (ADC) coupled to receive the sequence of output signals from the semiconductor device, wherein the ADC is also configured to receive a reference voltage, wherein the ADC is operable to generate and output a numeric value corresponding to a temperature of the semiconductor device, according to the sequence of output signals; and

wherein for a specified range of ideality factors, the reference voltage is operable to be adjusted such that the numeric value is substantially free of errors introduced by the ideality factor of the semiconductor device not matching an expected ideality factor of the specified range of ideality factors.

23. A system comprising:

an analog-to-digital converter (ADC);

a bandgap reference circuit coupled to the ADC, and configured to provide a reference voltage to the ADC;

an ideality factor register coupled to the bandgap reference circuit, and configured to hold an ideality factor value, wherein the bandgap reference circuit is operable to adjust the reference voltage based on the ideality factor value;

a bus interface coupled to the ideality factor register;

PN-junction coupled to the ADC, wherein the PN-junction has a substantially defined generally non-linear input-output characteristic that varies with temperature, and wherein the PN-j unction also has a substantially defined ideality factor; and

one or more current sources coupled to the PN-junction;

wherein the PN-junction is operable to receive one or more input currents from the one or more current sources, each input current generated by a respective one of the one or more current sources;

wherein the ADC is operable to produce a numeric value corresponding to a temperature of the PN-junction, according to the one or more input currents; and

wherein for a specified range of ideality factors, the reference voltage is operable to be adjusted such that the numeric value is substantially free of errors introduced by the ideality factor of the PN-junction not matching an expected ideality factor of the specified range of ideality factors.

24. The system of claim 23 , wherein the PN-junction is comprised in one of:

a diode; and

a BJT.

25. The system of claim 23 , wherein the ADC is one of:

a pipeline ADC;

a cyclic ADC;

a delta-sigma ADC;

a successive approximation ADC; and

an integrating ADC.

26. A method for monitoring temperature, the method comprising:

programming an ideality factor value corresponding to a PN-junction coupled to an ADC into a register;

adjusting a reference voltage of the ADC according to the ideality factor value;

applying one or more input currents to the PN-junction, the PN-junction having a substantially defined ideality factor and a substantially defined generally non-linear input-output characteristic that varies with temperature, the PN-junction developing a sequence of base-emitter voltages across its terminals in response to the one or more input currents, wherein each one of the sequence of base-emitter voltages is generated in response to a respective one of the one or more input currents;

generating a numeric value corresponding to a temperature of the PN-junction according to the sequence of base-emitter voltages via the ADC;

wherein for a specified range of ideality factors, said adjusting results in the numeric value being substantially free of errors introduced by the ideality factor of the PN-junction not matching an expected ideality factor of the specified range of ideality factors.

27. The method of claim 26 , wherein a relationship between the ideality factor value and the reference voltage is determined based on a mathematical equation relating a temperature gain of the PN-junction to:

the reference voltage;

a maximum difference in base-emitter voltage across the terminals of the PN-junction; and

a minimum difference in base-emitter voltage across the terminals of the PN-junction.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
MERGER Recorded Dec 11, 2017
From: STANDARD MICROSYSTEMS CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044824/0608 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2005
From: BURSTEIN, STEVEN; BEKKER, LEONID A.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 017316/0501 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2004
From: MCLEOD, SCOTT C.; ANDERSON, THOMAS R.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 015955/0979 →