IP Library Granted Patent US 7,154,143
Granted Patent B2
US 7,154,143 · App. 10/981,164 · Granted Dec 26, 2006

Non-volatile memory devices and methods of fabricating the same

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Quick Facts
Patent No.
US 7,154,143
App. No.
10/981,164
Granted
Dec 26, 2006
Kind
B2
Abstract

Non-volatile memory devices and methods of fabricating the same are disclosed. A disclosed non-volatile memory device includes: a tunnel oxide layer formed on a semiconductor substrate and having an energy bandgap; a storage oxide layer formed on the tunnel oxide layer and having an energy bandgap which is smaller than the energy bandgap of the tunnel oxide layer; a block oxide layer formed on the storage oxide layer and having an energy bandgap greater than the energy bandgap of the storage oxide layer; and a gate formed on the block oxide layer.

Claims (29)

1. A non-volatile memory device comprising:

a tunnel oxide layer comprising a first tunnel oxide layer on a semiconductor substrate and a second tunnel oxide layer on the first tunnel oxide layer, the first tunnel oxide layer having an energy bandgap less than an energy bandgap of the second tunnel oxide layer,

a storage oxide layer on the tunnel oxide layer, the storage oxide layer having an energy bandgap which is smaller than the energy bandgap of the first tunnel oxide layer;

a block oxide layer on the storage oxide layer, the block oxide layer having an energy bandgap greater than the energy bandgap of the storage oxide layer, and

a gate on the block oxide layer.

2. A non-volatile memory device as defined in claim 1 , wherein each of the tunnel oxide layer and the block oxide layer has a conduction band, and the conduction bands of the tunnel oxide layer and the block oxide layer are greater than a conduction band of the storage oxide layer, such that an electric potential barrier between the tunnel oxide layer and the storage oxide layer and an electric potential barrier between the block oxide layer and the storage layer define an electric charge well.

3. A non-volatile memory device as defined in claim 2 , wherein electrons flow from the semiconductor substrate over the electric potential barrier between the semiconductor substrate and the tunnel oxide layer and are stored within the electric charge well by a hot carrier injection technique during a programming operation.

4. A non-volatile memory device as defined in claim 2 , wherein electrons tunnel through the tunnel oxide layer to flow from the electric charge well to the semiconductor substrate by a direct tunneling or an F-N tunneling technique during an erasing operation.

5. A non-volatile memory device as defined in claim 1 , wherein the tunnel oxide layer comprises one or more of SiO 2 , Al 2 O 3 , or Y 2 O 3 .

6. A non-volatile memory device as defined in claim 1 , wherein the storage oxide layer comprises one or more of HfO 2 , ZrO 2 , BaZrO 2 , BaTiO 3 , Ta 2 O 5 , CaO, SrO, BaO, La 2 O 3 , Ce 2 O 3 , Pr 2 O 3 , Nd 2 O 3 , Pm 2 O 3 , Sm 2 O 3 , Eu 2 O 3 , Gd 2 O 3 , Tb 2 O 3 , Dy 2 O 3 , Ho 2 O 3 , Er 2 O 3 , Tm 2 O 3 , Yb 2 O 3 , or Lu 2 O 3 .

7. A non-volatile memory device as defined in claim 1 , wherein the block oxide layer comprises one or more of SiO 2 , Al 2 O 3 , or Y 2 O 3 .

8. A non-volatile memory device as defined in claim 1 , wherein the tunnel oxide layer has a thickness in a range of about 30–150 Å.

9. A non-volatile memory device as defined in claim 1 , wherein the storage oxide layer has a thickness in a range of about 40–500 Å.

10. A non-volatile memory device as defined in claim 1 , wherein the block oxide layer has a thickness in a range of about 40–200 Å.

11. A non-volatile memory device as defined in claim 1 , wherein the first tunnel oxide layer is thicker than the second tunnel oxide layer.

12. A non-volatile memory device as defined in claim 11 , wherein the first tunnel oxide layer has a thickness in a range of about 30–150 Å.

13. A non-volatile memory device as defined in claim 11 , wherein the second tunnel oxide layer has a thickness in a range of about 5–40 Å.

14. A non-volatile memory device as defined in claim 11 , wherein the first tunnel oxide layer comprises one or more of HfO 2 , ZrO 2 , BaZrO 2 , BaTiO 3 , Ta 2 O 5 , CaO, SrO, BaO, La 2 O 3 , Ce 2 O 3 , Pr 2 O 3 , Nd 2 O 3 , Pm 2 O 3 , Sm 2 O 3 , Eu 2 O 3 , Gd 2 O 3 , Tb 2 O 3 , Dy 2 O 3 , Ho 2 O 3 , Er 2 O 3 , Tm 2 O 3 , Yb 2 O 3 , or Lu 2 O 3 .

15. A non-volatile memory device as defined in claim 11 , wherein the second tunnel oxide layer comprises one or more of SiO 2 , Al 2 O 3 , or Y 2 O 3 .

16. A non-volatile memory device as defined in claim 1 , wherein an electric potential barrier between the second tunnel oxide layer and the storage oxide layer is greater than an electric potential barrier formed between the first and second tunnel oxide layers.

17. A non-volatile memory device as defined in claim 11 , wherein each of the second tunnel oxide layer and the block oxide layer has a conduction band, and the conduction bands of the second tunnel oxide layer and the block oxide layer are higher than a conduction band of the storage oxide layer, such that an electric potential barrier between the first tunnel oxide layer and the storage oxide layer and an electric potential barrier between the block oxide layer and the storage oxide layer define an electric charge well.

18. A non-volatile memory device as defined in claim 1 , wherein the block oxide layer includes a first block oxide layer on the storage oxide layer and a second block oxide layer on the first block oxide layer, the second block oxide layer having an energy bandgap greater than the energy bandgap of the storage oxide layer and less than the energy bandgap of the first block oxide layer.

19. A non-volatile memory device as defined in claim 18 , wherein the second block oxide layer is thicker than the first block oxide layer.

20. A non-volatile memory device as defined in claim 18 , wherein the first block oxide layer has a thickness in a range of about 10–50 Å.

21. A non-volatile memory device as defined in claim 18 , wherein the second block oxide layer has thickness in a range of about 40–200 Å.

22. A non-volatile memory device as defined in claim 18 , wherein the first block oxide layer comprises one or more of SiO 2 , Al 2 O 3 , or Y 2 O 3 .

23. A non-volatile memory device as defined in claim 18 , wherein the second block oxide layer comprises one or more of HfO 2 , ZrO 2 , BaZrO 2 , BaTiO 3 , Ta 2 O 5 , CaO, SrO, BaO, La 2 O 3 , Ce 2 O 3 , Pr 2 O 3 , Nd 2 O 3 , Pm 2 O 3 , Sm 2 O 3 , Eu 2 O 3 , Gd 2 O 3 , Tb 2 O 3 , Dy 2 O 3 , Ho 2 O 3 , Er 2 O 3 , Tm 2 O 3 , Yb 2 O 3 , or Lu 2 O 3 .

24. A non-volatile memory device as defined in claim 18 , wherein an electric potential barrier between the first block oxide layer and the storage layer is greater than an electric potential barrier between the first and second block oxide layers.

25. A non-volatile memory device as defined in claim 18 , wherein conduction bands of the tunnel oxide layer and the first block oxide layer are greater than a conduction band of the storage oxide layer such that an electric charge well is defined by electric potential barriers formed between the tunnel oxide layer and the storage oxide layer and between the first block oxide layer and the storage oxide layer.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041377/0285 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017749 FRAME 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 21, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017821/0670 →
CHANGE OF NAME Recorded Jun 8, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017749/0335 →
MERGER Recorded May 31, 2005
From: ANAM SEMICONDUCTOR INC.; ANAM SEMICONDUCTOR INC.
To: DONGBUANAM SEMICONDUCTOR, INC., A KOREAN CORPORATION
Reel/Frame 016593/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2004
From: JUNG, JIN HYO
To: ANAM SEMICONDUCTOR, INC., A KOREAN CORPORATION
Reel/Frame 015967/0776 →