Method for forming fine patterns of semiconductor device

1. A method for forming fine patterns of a semiconductor device, comprising the steps of:

forming an lower layer to be etched over a semiconductor substrate;

forming a first photoresist file pattern having a width of two line patterns and one space pattern on the lower layer;

etching the lower layer using the first photoresist film pattern as an etching mask until the semiconductor substrate is exposed to form a first lower layer pattern;

subjecting the exposed semiconductor substrate to a C-HALO implant process to form an ion-implanted region;

removing the first photoresist film pattern on the first lower layer pattern;

patterning a second photoresist film pattern, the second photoresist pattern having a substantially same size as the first photoresist film pattern and shifted from the first photoresist pattern by a distance corresponding to one line pattern and one space pattern; and

etching the first lower layer pattern using the second photoresist film pattern as an etching mask until the semiconductor substrate is exposed to form a second lower layer pattern.

2. The method according to claim 1 , further comprising performing a cleaning process prior to or after the C-HALO implant process.

3. The method according to claim 1 , wherein the width of the first lower layer pattern ranges from 30 nm to 450 nm, and the width of the space between the first lower layer patterns ranges from 30 nm to 300 nm.

4. The method according to claim 1 , wherein the width of the first lower layer pattern ranges from 90 nm to 300 nm, and the width of the space between the first lower layer patterns ranges from 60 nm to 150 nm.

5. The method according to claim 1 , wherein the width of the second lower layer pattern ranges from 10 nm to 150 nm, and the width of the space between the second lower layer patterns ranges from 10 nm to 150 nm.

6. The method according to claim 1 , wherein the lower layer comprising a nitride film and the processes of etching the lower layer and the first lower layer pattern are performed using a gas selected from the group consisting of CHF 3 , O 2 , Ar, and combinations thereof.

7. The method according to claim 1 , wherein the lower layer comprises a metal film and the processes of etching the lower layer and the first lower layer pattern are performed using a gas selected from the group consisting of SF 6 , Ar, and combinations thereof.

8. The method according to claim 1 , wherein the lower layer comprises a polysilicon film and the processes of etching the lower layer and the first lower layer pattern are performed using a gas selected from the group consisting of CL 2 , HBr, O 2 , and combinations thereof.

9. The method according to claim 1 , wherein the C-HALO implant process is performed using an ion selected from the group consisting of Br and BF 2 .

10. The method according to claim 1 , further comprising subjecting the semiconductor substrate to a blanket implant process using a selected from the group consisting of Br and In after formation of the second lower layer pattern.

11. The method according to claim 1 , further comprising expanding or reflowing the first or second photoresist film pattern at a temperature ranging from 120° C. to 300° C.

12. The method according to claim 1 , wherein the first and second photoresist films are a positive or negative type respectively.

13. A method for forming fine patterns of a semiconductor device, comprising the steps of:

forming an lower layer over a semiconductor substrate;

forming a first photoresist film pattern having a width of two line patterns and a space pattern on the lower layer;

etching the lower layer using the first photoresist film pattern as an etching mask to form a first lower layer pattern;

removing the first photoresist film pattern on the first lower layer pattern;

forming a second photoresist film pattern having a width of two line patterns and one space pattern on the semiconductor substrate including the first lower layer pattern;

etching the first lower layer pattern using the second photoresist film pattern as an etching mask until the semiconductor substrate is exposed to form a second lower layer pattern, wherein the width of the second lower layer pattern is less than the width of the first layer pattern; and

subjecting the exposed semiconductor substrate to a C-HALO implant process to form an ion-implanted region.

14. The method according to claim 1 , wherein the ratio of a line width of the line pattern to a line width of the space pattern defined between two neighboring line patterns is substantially 1:1.