IP Library Granted Patent US 7,038,498
Granted Patent B2
US 7,038,498 · App. 11/000,005 · Granted May 2, 2006

Input/output circuit, reference-voltage generating circuit, and semiconductor integrated circuit

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Quick Facts
Patent No.
US 7,038,498
App. No.
11/000,005
Granted
May 2, 2006
Kind
B2
Abstract

Disclosed is an input/output circuit having a terminating circuit that contributes to a smaller chip area. The input/output includes an output buffer having a first series circuit, which comprises a first transistor and a resistor and a second series circuit, which comprises a second transistor and a resistor, connected in parallel between a high-potential power supply and an input/output pin, as well as a third series circuit, which comprises a third transistor and a resistor and a fourth series circuit, which comprises a fourth transistor and a resistor, connected in parallel between the input/output pin and a low-potential power supply. The input/output circuit further includes an input buffer having an input terminal connected to the input/output pin, and a control circuit which, at the time of a signal output, performs control for supplying a signal, which is obtained by inverting the logic of output data, to gates of the first to fourth transistors, and which, at the time of a signal input, performs control for supplying the gates of the first and third transistors with the high-potential power supply voltage and low-potential power supply voltage, respectively, and the gates of the second and fourth transistors with the low-potential power supply voltage and high-potential power supply voltage, respectively.

Claims (16)

1. A reference-voltage generating circuit for generating a voltage to supply the generated voltage as a reference voltage to an input circuit of an input/output circuit, said input/output circuit having an output circuit comprising:

a first series circuit including a first transistor and a first resistor connected serially between a high-potential power supply and an input/output pin;

a second series circuit including a second transistor and a second resistor connected serially between the input/output pin and a low-potential power supply; and

control means for turning on the first and second transistors based upon a control signal at the time of a signal input from the input/output pin to said input circuit, thereby causing said first and second series circuits to operate a terminating circuit of a line connected to the input/output pin;

wherein said reference-voltage generating circuit comprises a circuit for generating the reference voltage equal to a voltage, which prevails in the absence of an applied signal, at a connection node between the input/output pin and said first and second series circuits composing said terminating circuit in the input/output circuit.

2. A semiconductor integrated circuit which sends and receives signals to and from a semiconductor integrated circuit having the reference-voltage generating circuit set forth in claim 1 , comprising a reference circuit having input and output terminals connected together;

the output terminal of said reference circuit being connected to the reference-voltage output terminal of said reference-voltage generating circuit.

3. A memory device comprising the reference-voltage generating circuit set forth in claim 1 .

4. A reference-voltage generating circuit for supplying an input circuit, which receives differentially an input signal from an input terminal and a reference voltage, said reference-voltage generating circuit comprising:

a first series circuit including a first transistor and a first resistor connected serially between a high-potential power supply and a reference-voltage output terminal; and

a second series circuit including a second transistor and a second resistor connected serially between the reference-voltage output terminal and a low-potential power supply;

wherein the first and second transistors are set to an ON state to output the reference voltage from the reference-voltage output terminal.

5. The reference-voltage generating circuit according to claim 4 , further comprising an operational amplifier having an output terminal, a non-inverting input terminal for receiving the reference voltage output from the reference-voltage output terminal, and an inverting input terminal to which said output terminal is connected;

wherein an output signal from the output terminal of said operational amplifier is supplied to said input circuit as the reference voltage.

6. The reference-voltage generating circuit according to claim 4 , wherein the reference-voltage output terminal of said reference-voltage generating circuit is connected to an output terminal of a reference circuit, said reference circuit having input and output terminals being connected together.

7. A memory device comprising the reference-voltage generating circuit set forth in claim 4 .

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032894/0588 →
RELEASE OF SECURITY INTEREST Recorded Feb 24, 2014
From: APPLE, INC
To: ELPIDA MEMORY, INC.
Reel/Frame 032331/0637 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
SECURITY AGREEMENT Recorded May 15, 2012
From: ELPIDA MEMORY, INC.
To: APPLE INC.
Reel/Frame 028209/0477 →