Method for manufacturing semiconductor device
View Patent ↗A first insulating film, a second insulating film, a third insulating film, an antireflective film, and a resist film are formed in this order on a lower-layer wiring. After dry etching the third insulating film and the second insulating film, using the resist film as a mask, the resist film and the antireflective film are removed by ashing. Thereafter, the first insulating film is dry etched, using the third insulating film as a mask, to form a wiring trench extending to the lower-layer wiring. The dry etching of the third insulating film and the second insulating film is performed using a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa. Ashing is preferably performed using at least one of hydrogen and an inert gas.
1. A method for manufacturing a semiconductor device having a multi-layer wiring structure, comprising:
forming a first insulating film on a lower-layer wiring that is on a semiconductor substrate;
forming a second insulating film having a large etching selection ratio relative to said first insulating film, and having a relative dielectric constant not exceeding 3.0, on said first insulating film;
forming a third insulating film as a cap film on said second insulating film;
forming a first resist film having a predetermined pattern on said third insulating film;
dry etching said third insulating film and said second insulating film, using said first resist film as a mask, to form an opening extending to said first insulating film;
removing said first resist film by ashing using at least one of hydrogen and an inert gas;
dry etching said first insulating film, using said third insulating film as a mask, to form a wiring trench extending to said lower-layer wiring;
forming a copper layer filling said wiring trench; and
planarizing by chemical mechanical polishing (CMP), leaving said copper layer only in said wiring trench, to form a trench wiring electrically connected to said lower wiring, wherein dry etching of said third and second insulating films and dry etching of said first insulating film use a fluorine-containing gas at a pressure of 0.1 Pa to 4 Pa.
2. The method for manufacturing a semiconductor device according to claim 1 , including dry etching of said third and second insulating films using a fluorine-containing gas at a pressure of 0.8 Pa to 3.3 Pa.
3. The method for manufacturing a semiconductor device according to claim 1 , wherein said second insulating film is composed of a material including siloxane bonds having methyl groups as chain-forming bonds.
4. The method for manufacturing a semiconductor device according to claim 1 , wherein said second insulating film is one of a methyl silsesquioxane (MSQ) film and a porous MSQ film.
5. The method for manufacturing a semiconductor device according to claim 1 , further comprising:
forming a fourth insulating film on said french wiring;
forming a fifth insulating film having a large etching selection ratio relative to said fourth insulating film, and having a relative dielectric constant not exceeding 3.0, on said fourth insulating film;
forming a sixth insulating film as a cap film on said fifth insulating film;
forming a second resist film having a predetermined pattern on said sixth insulating film;
dry etching said sixth insulating film and said fifth insulating film, using said second resist film as a mask, to form an opening extending to said fourth insulating film;
removing said second resist film by ashing;
dry etching said fourth insulating film, using said sixth insulating film as a mask, to form a via hole extending to said trench wiring;
forming a copper layer filing said via hole; and
planarizing by CMP, leaving said copper layer only in said via hole, to form a via plug electrically connected to said trench wiring, wherein dry etching of said sixth insulating film uses a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa.
6. The method for manufacturing a semiconductor device according to claim 5 , including dry etching of said third and second insulating films using a fluorine-containing gas at a pressure of 0.8 Pa to 3.3 Pa.
7. The method for manufacturing a semiconductor device according to claim 5 , including ashing of said second resist film using at least one of hydrogen and an inert gas.
8. The method for manufacturing a semiconductor device according to claim 5 , wherein said fifth insulating film is composed of a material including siloxane bonds having methyl groups as chain-forming bonds.
9. The method for manufacturing a semiconductor device according to claim 5 , wherein said fifth insulating film is one of a methyl silsesquioxane (MSQ) film and a porous MSQ film.
10. The method for manufacturing a semiconductor device according to claim 1 , wherein said fluorine-containing gas is CF 4 .
11. A method for manufacturing a semiconductor device having a multi-layer wiring structure, comprising:
forming a first insulating film on a lower-layer wiring on a semiconductor substrate;
forming a second insulating film having a large etching selection ratio relative to said first insulating film, and having a relative dielectric constant not exceeding 3.0, on said first insulating film;
forming a third insulating film as a cap film on said second insulating film;
forming a first antireflective film on said third insulating film;
forming a first resist film having a predetermined pattern on said first antireflective film;
dry etching said first antireflective film, said third insulating film, and said second insulating film, using said first resist film as a mask, to form an opening extending said first insulating film;
removing said first resist film and said first antireflective film by ashing;
dry etching said first insulating film, using said third insulating film as a mask, to form a wiring trench extending to said lower-layer wiring;
forming a copper layer filling said wiring wench; and
planarizing by chemical mechanical polishing (CMP), leaving said copper layer only in said wiring trench, to form a wench wiring electrically connected to said lower-layer wiring, wherein dry etching of said first antireflective film and said third and second insulating films uses a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa.
12. The method for manufacturing a semiconductor device according to claim 11 , including dry etching of said first antireflective film and said third and second insulating films uses a fluorine-containing gas at a pressure of 0.8 Pa to 3.3 Pa.
13. The method for manufacturing a semiconductor device according to claim 11 , including ashing of said first resist film and said first antireflective film using at least one of hydrogen and an inert gas.
14. The method for manufacturing a semiconductor device according to claim 11 , wherein said second insulating film is composed of a material including siloxane bonds having methyl groups as chain-forming bonds.
15. The method for manufacturing a semiconductor device according to claim 11 , wherein said second insulating film is one of a methyl silsesquioxane (MSQ) film and a porous MSQ film.
16. The method for manufacturing a semiconductor device according to claim 11 , further comprising:
forming a fourth insulating film on said trench wiring;
forming a fifth insulating film having a large etching selection ratio relative to said fourth insulating film, and having a relative dielectric constant not exceeding 3.0, on said fourth insulating film;
forming a sixth insulating film as a cap film on said fifth insulating film;
forming a second antireflective film on said sixth insulating film;
forming a second resist film having a predetermined pattern on said second antireflective film;
dry etching said second antireflective film, said sixth insulating film, and said fifth insulating film using said second resist film as a mask, to form an opening extending to said fourth insulating film;
removing said second resist film and said second antireflective film by ashing;
dry etching said fourth insulating film, using said sixth insulating film as a mask, to form a via hole extending to said trench wiring;
forming a copper layer filling said via hole; and
planarizing by CMP, leaving said copper layer only in said via hole, to form a via plug electrically connected to said trench wiring, including dry etching said second antireflective film and said sixth, and fifth insulating films using a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa.
17. The method for manufacturing a semiconductor device according to claim 16 , including dry etching of said first antireflective film and said third and second insulating film using a fluorine-containing gas at a pressure of 0.8 Pa to 3.3 Pa.
18. The method for manufacturing a semiconductor device according to claim 16 , including ashing said second resist film and said second antireflective film using at least one of hydrogen and an inert gas.
19. The method for manufacturing a semiconductor device according to claim 16 , wherein said fifth insulating film is composed of a material including siloxane bonds having methyl groups as chain-forming bonds.
20. The method for manufacturing a semiconductor device according to claim 16 , wherein said fifth insulating film is one of a methyl silsesquioxane (MSQ) film and a porous MSQ film.