IP Library Granted Patent US 7,259,056
Granted Patent B2
US 7,259,056 · App. 11/003,493 · Granted Aug 21, 2007

Method for manufacturing semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,259,056
App. No.
11/003,493
Granted
Aug 21, 2007
Kind
B2
Abstract

In a method for manufacturing a semiconductor device, gate insulation films and gate electrodes are first formed on a substrate. An impurity is implanted into each gate electrode. Next, a first heat treatment is performed to the substrate for diffusing the impurity in the gate electrodes. After the heat treatment, a second heat treatment is performed for releasing stress generated in the substrate in the first heat-treatment. Thereafter, an impurity is implanted into an area to become an implanted region of the substrate, using the gate electrodes as masks, and a third heat treatment is performed for activating the impurity implanted.

Claims (22)

1. A method of manufacturing a semiconductor device comprising, sequentially:

forming a gate insulation film and a gate electrode on a substrate;

implanting an impurity into said gate electrode;

activating the impurity in said gate electrode;

after activating the impurity in said gate electrode, heat treating to release stress generated in said substrate in activating the impurity in said gate electrode;

implanting an impurity into said substrate to form a first implanted region, using said gate electrode as a mask; and

activating the impurity implanted into said first implanted region.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising, after activating the impurity implanted in said first implanted region:

forming a gate sidewall on the side of said gate electrode at a temperature of 500 to 650° C.; and

implanting an impurity into said substrate to form a second implanted region, using said gate electrode and said sidewall as masks.

3. The method of manufacturing a semiconductor device according to claim 2 , including

activating the impurity in said gate electrode by rapid thermal annealing;

releasing the stress in said substrate by the heat treating at 500 to 650° C. for at least 60 seconds; and

activating the impurity in the first implanted region using a flash lamp.

4. The method of manufacturing a semiconduetor device according to claim 2 , further comprising, before forming said first implanted region, forming an amorphous region on an area to become said first implanted region, by implanting ions obliquely into said substrate, using said gate electrode as a mask.

5. The method of manufacturing a semiconductor device according to claim 4 , including forming said amorphous region by implanting ions at a gradient of about 20 to 30 degrees to a direction normal to said substrate.

6. The method of manufacturing a semiconductor device according to claim 1 , including

activating the impurity implanted in said gate electrode by rapid thermal annealing;

releasing the stress in said substrate by the heat treating at 500 to 650° C. for at least 60 seconds; and

activating the impurity in the first implanted region using a flash lamp.

7. The method of manufacturing a semiconductor device according to claim 1 , further comprising, before forming said first implanted region, forming an amorphous region on an area to become said first implanted region, by implanting ions obliquely into said substrate, using said gate electrode as a mask.

8. The method of manufacturing a semiconductor device according to claim 7 , including forming said amorphous region by implanting ions at a gradient of about 20 to 30 degrees to a direction normal to said substrate.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0975 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2005
From: SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 016075/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2004
From: MINEJI, AKIRA
To: SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC.
Reel/Frame 016062/0391 →