IP Library Granted Patent US 7,442,581
Granted Patent B2
US 7,442,581 · App. 11/009,284 · Granted Oct 28, 2008

Flexible carrier and release method for high volume electronic package fabrication

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,442,581
App. No.
11/009,284
Granted
Oct 28, 2008
Kind
B2
Abstract

Methods and apparatus are provided for use in manufacturing a device packaging comprising the steps of: positioning a metal substrate such as spring steel on a magnetic plate so as to expose a surface of the metal substrate; placing a first tape layer on the exposed surface of a metal substrate so as to expose a nonstick surface of the first tape layer such as PTFE; placing a second tape layer on the exposed surface of the first tape layer so as to expose a surface of the second tape layer; positioning a mold frame on the exposed surface of the second tape layer; positioning a die within the mold frame; depositing epoxy within the mold frame; curing the epoxy so as to create a molded panel; removing the mold frame; grinding the molded panel to a desired thickness; separating the first tape layer from the second tape layer so as to separate the metal substrate from the molded panel; and peeling the second tape layer from the molded panel. The process provides an efficient method for creating a chips first package.

Claims (62)

1. A method for use in manufacturing a device packaging comprising the steps of:

positioning a substrate on a magnetic plate;

placing a first tape layer on the substrate;

placing a second tape layer on the first tape layer;

positioning multiple electronic devices on the second tape layer after placing the second tape layer on the first tape layer;

depositing epoxy on the second tape layer to create a molded panel containing the multiple electronic devices;

separating the first tape layer from the second tape layer so as to separate the substrate from the molded panel; and

peeling the second tape layer from the molded panel without the use of solvents.

2. The method according to claim 1 wherein the step of depositing epoxy further comprises the steps of:

positioning a mold frame on the second tape layer;

positioning a die within the mold frame;

depositing epoxy within the mold frame;

curing the epoxy so as to create the molded panel;

removing the mold frame; and

grinding the molded panel to a desired thickness. The method according to claim 1 wherein the substrate comprises a flexible steel substrate.

3. The method according to claim 1 wherein the substrate comprises a Flexible substrate.

4. The method according to claim 1 wherein the substrate comprises a metal substrate.

5. The method according to claim 1 further comprising the step of attaching the molded panel to a vacuum chuck prior to separating the first tape layer from the second tape layer.

6. The method according to claim 1 wherein the second tape layer comprises an acrylic layer in contact with the first tape layer.

7. The method according to claim 1 wherein the second tape layer comprises a filled silicone layer in contact with the mold frame and the molded panel.

8. The method according to claim 1 wherein the first tape layer comprises a PTFL layer in contact with the second tape layer.

9. A method for use in manufacturing a device packaging comprising the steps of:

positioning a metal substrate on a magnetic plate;

placing a first tape layer on the metal substrate;

placing a second tape layer on the first tape layer;

positioning a mold frame on the second tape layer;

placing multiple electronic devices on the second tape layer;

positioning a die within the mold frame;

depositing epoxy on the second tape layer and within the mold frame;

curing the epoxy so as to create a molded panel containing the multiple electronic devices;

removing the mold frame;

grinding the molded panel to a desired thickness;

separating the first tape layer from the second tape layer so as to separate the metal substrate from the molded panel; and

peeling the second tape layer from a surface of the molded panel to expose the multiple electronic devices through the surface of the molded panel.

10. The method according to claim 9 wherein the metal substrate comprises a flexible steel substrate.

11. The method according to claim 9 further comprising the step of attaching the molded panel to a vacuum chuck prior to separating the first tape layer from the second tape layer.

12. The method according to claim 9 wherein the second tape layer comprises an acrylic layer in contact with the first tape layer.

13. The method according to claim 9 wherein the second tape layer comprises a filled silicone layer in contact with the mold frame and the molded panel.

14. The method according to claim 9 wherein the first tape layer comprises a PTFE layer in contact with the second tape layer.

15. The method according to claim 9 further comprising the step of removing the magnetic plate from the metal substrate prior to the step of grinding the molded panel.

16. The method according to claim 9 wherein the step of curing the epoxy comprises heating at approximately 150° C. for approximately 90 minutes.

17. A method for use in manufacturing a device packaging comprising the steps of:

positioning a metal substrate on a magnetic plate so as to expose a surface of the metal substrate;

placing a nonstick material on the exposed surface of the metal substrate thereby creating a nonstick surface;

placing a tape layer having a first major surface and a second major surface on the metal substrate such that the first major surface of the tape layer contacts the nonstick surface of the metal substrate, the first major surface disposed substantially opposite the second major surface;

positioning a mold frame on the second major surface of the tape layer;

placing multiple electronic devices on the second major surface of the tape layer;

positioning a die within the mold frame;

depositing epoxy within the mold frame on the second major surface of the tape layer;

curing the epoxy so as to create a molded panel containing the multiple electronic devices;

removing the mold frame;

grinding the molded panel to a desired thickness;

separating the metal substrate from the tape layer so as to separate the metal substrate from the molded panel; and

peeling the tape layer from the molded panel without the use of solvents to expose the multiple electronic devices.

18. The method according to claim 17 wherein the metal substrate comprises a flexible steel substrate.

19. The method according to claim 17 wherein the nonstick material comprises PTFL.

20. The method according to claim 17 wherein the tape layer comprises an acrylic layer in contact with the nonstick surface.

21. The method according to claim 17 wherein the tape layer comprises a filled silicone layer in contact with the mold frame and the molded panel.

22. The method according to claim 21 wherein the filled silicone layer comprises calcium carbonate filler.

23. The method according to claim 17 wherein the tape layer is up to approximately 200 microns in thickness.

24. The method according to claim 20 wherein the acrylic layer is up to approximately 100 microns in thickness.

25. The method according to claim 21 wherein the filled silicone layer is up to approximately 100 microns in thickness.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0807 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 12, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 022380/0409 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2004
From: LYTLE, WILLIAM H.; AMRINE, CRAIG S.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 016081/0981 →