IP Library Patent Application 11014883
Patent Application
App. No. 11/014,883

Multilayered wiring structure, method of forming buried wiring, semiconductor device, method of manufacturing semiconductor device, semiconductor mounted device, and method of manufacturing semiconductor mounted device

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Patent No.
US None
App. No.
11/014,883
Abstract

A method of forming a buried wiring in a low-k dielectric film, includes: forming a low-k dielectric film having a dielectric constant of 3 or less on an underlayer; removing the low-k dielectric film by a first width from an edge of the underlayer; forming a cap film on the low-k dielectric film, after removing the low-k dielectric film by the first width; forming a groove in the cap film and the low-k dielectric film; forming a conductive film in the groove and on the cap film; removing the conductive film by a second width, different from the first width by 1 mm or more, from the edge of the underlayer; and polishing unnecessary portions of the conductive film on the cap film, after removing the conductive film by the second width.

Claims (83)

1 . A method of forming a buried wiring in a low-k dielectric film, comprising:

forming a low-k dielectric film having a dielectric constant not exceeding 3 on an underlayer;

removing the low-k dielectric film by a first width from an edge of the underlayer;

forming a cap film on the low-k dielectric film, after removing the low-k dielectric film by the first width;

forming a groove in the cap film and the low-k dielectric film;

forming a conductive film in the groove and on the cap film;

removing the conductive film by a second width, different from the first width by at least 1 mm, from the edge of the underlayer; and

removing portions of the conductive film on the cap film, after removing the conductive film by the second width.

2 . The method of forming a buried wiring according to claim 1 , wherein the first width is in a range from 4 mm to 15 mm.

3 . The method of forming a buried wiring according to claim 1 , wherein the second width is smaller than the first width.

4 . A method of manufacturing a semiconductor device, comprising:

forming a semiconductor element having a diffusion region in a substrate;

forming an interlayer insulating film covering the semiconductor element;

forming a contact connected to the diffusion region in the interlayer insulating film;

forming a low-k dielectric film having a dielectric constant not exceeding 3 on the contact and the interlayer insulating film;

removing the low-k dielectric film by a first width from an edge of the substrate;

forming a cap film on the low-k dielectric film, after removing the low-k dielectric film by the first width;

forming a groove reaching a top surface of the contact in the cap film and the low-k dielectric film;

forming a conductive film in the groove and on the cap film;

removing the conductive film by a second widths different from the first width by at least 1 mm, from the edge of the substrate; and

removing portions of the conductive film on the cap film, after removing the conductive film.

5 . The method of manufacturing a semiconductor device according to claim 4 , wherein the first width is in a range from 4 mm to 15 mm.

6 . The method of manufacturing a semiconductor device according to claim 4 , wherein the second width is smaller than the first width.

7 . A method of manufacturing a semiconductor mounted device, comprising:

forming a low-k dielectric film having a dielectric constant not exceeding 3 on a semiconductor device having a semiconductor element;

removing the low-k dielectric film by a first width from an edge of the semiconductor device;

forming a cap film on the low-k dielectric film, after removing the low-k dielectric film by the first width;

forming a groove in the cap film and the low-k dielectric film;

forming a conductive film in the groove and on the cap film;

removing the conductive film by a second width, different from the first width by at least 1 mm, from the edge of the semiconductor device; and

removing portions of the conductive film on the cap film, after removing the conductive film by the second width.

8 . A multilayered wiring structure comprising:

a first low-k dielectric film on a substrate and spaced by a first width from an edge of the substrate;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive film and the first low-k dielectric film, and spaced by a second widths smaller than the first width by at least 0.7 mm, from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

9 . A multilayered wiring structure comprising:

a first low-k dielectric film on a substrate and spaced by a first width from an edge of the substrate;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive film and the first low-k dielectric film and spaced by a second widths larger than the first width by at least 0.4 mm, from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

10 . A semiconductor device comprising:

a semiconductor element on a substrate and having a diffusion region;

an interlayer insulating film covering the semiconductor element;

a contact in the interlayer insulating film and connected to the diffusion region;

a first low-k dielectric film on the contact and the interlayer insulating film, and spaced by a first width from an edge of the substrate;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive layer and the first low-k dielectric film, and spaced by a second width, smaller than the first width by at least 0.7 mm, from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

11 . A semiconductor device comprising:

a semiconductor element on a substrate and having a diffusion region;

an interlayer insulating film covering the semiconductor element;

a contact in the interlayer insulating film and connected to the diffusion region;

a first low-k dielectric film on the contact and the interlayer insulating film, and spaced by a first width from an edge of the substrate;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive layer and the first low-k dielectric film, and spaced by a second width, larger than the first width by at least 0.4 mm, from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

12 . The semiconductor device according to claim 10 , further comprising:

a third low-k dielectric film on the second low-k dielectric film and the second conductive layer, and spaced by the first width from the edge of the substrate;

a third conductive layer in a third opening in the third low-k dielectric film;

a fourth low-k dielectric film on the third low-k dielectric film and the conductive layer, and spaced by the second width from the edge of the substrate; and

a fourth conductive layer in a fourth opening in the fourth low-k dielectric film.

13 . The semiconductor device according to claim 11 , further comprising:

a third low-k dielectric film on the second low-k dielectric film and the second conductive layer, and spaced by the first width from the edge of the substrate;

a third conductive layer in a third opening in the third low-k dielectric film;

a fourth low-k dielectric film on the third low-k dielectric film and the conductive layer, and spaced by the second width from the edge of the substrate; and

a fourth conductive layer in a fourth opening in the fourth low-k dielectric film.

14 . The semiconductor device according to claim 10 , wherein the first width is different from the second width by at least 1.0 mm when the second low-k dielectric film has a Young's modulus of at least 4 GPa and a thickness of at least 600 nm.

15 . The semiconductor device according to claim 11 , wherein the first width is different from the second width by at least 1.0 mm when the second low-k dielectric film has a Young's modulus of at least 4 GPa and a thickness of at least 600 nm.

16 . The semiconductor device according to claim 10 , wherein the first width is different from the second width by at least 1.2 mm when the second low-k dielectric film has a Young's modulus of at least 2 GPa and less than 4 GPa and a thickness of at least 800 nm.

17 . The semiconductor device according to claim 11 , wherein the first width is different from the second width by at least 1.2 mm when the second low-k dielectric film has a Young's modulus of at least 2 GPa and less than 4 GPa and a thickness of at least 800 nm.

18 . A semiconductor mounted device comprising:

a semiconductor chip having a semiconductor element and an upper wiring on a substrate;

a first low-k dielectric film on the semiconductor chip and spaced by a first width from an edge of the semiconductor chip;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive film and the first low-k dielectric film, and removed by a second width smaller than the first width by at least 0.7 mm from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

19 . A semiconductor mounted device comprising:

a semiconductor chip having a semiconductor element and an upper wiring on a substrate;

a first low-k dielectric film on the semiconductor chip and spaced by a first width from an edge of the semiconductor chip;

a first conductive layer in a first opening in the first low-k dielectric film;

a second low-k dielectric film on the first conductive film and the first low-k dielectric film, and spaced by a second width, larger than the first width by at least 0.4 mm, from the edge of the substrate; and

a second conductive layer in a second opening in the second low-k dielectric film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2005
From: SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 016206/0616 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2004
From: KONDO, SEIICHI; MISAWA, KAORI
To: SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC.
Reel/Frame 016112/0404 →