Method and system for high speed network application
View Patent ↗A method and system for monitoring frame flow in a Fiber Channel network is provided. The method includes, deleting fill words before any frame data is allowed to be stored in a buffer memory; storing only certain primitive signals and/or frame data in the buffer memory; reading the buffer memory without delay, if a primitive signal is stored in the buffer memory; and delaying reading the buffer memory if frame data is detected. The network includes, a host bus adapter that includes a fiber channel protocol manager that includes a receive logic that deletes fill words before any frame data is allowed to be stored in a buffer memory, wherein the buffer memory stores only certain primitive signals and/or frame data and the buffer memory is read without any delay, if a primitive signal is stored, while a read operation of the buffer memory involving frame data is delayed.
1. A method for monitoring frame flow in a Fibre Channel network, comprising:
deleting fill words before any frame data is allowed to be stored in a buffer memory;
storing only certain primitive signals and/or frame data in the buffer memory;
reading the buffer memory without delay, if a primitive signal is stored in the buffer memory; and
delaying reading the buffer memory if frame data is detected.
2. The method of claim 1 , wherein the buffer memory is based on a First in-First out system.
3. The method of claim 1 , wherein the primitive signals include an R_RDY, a BB_SC, and/or a BB_SCr.
4. The method of claim 1 , wherein the delay in reading the buffer memory may be for at least three words of received data.
5. The method of claim 1 , wherein data is reorganized to a known format before being stored in the buffer memory.
6. The method of claim 5 , wherein certain registers in a receive FIFO logic are used to re-organize the data to a known format.
7. A host bus adapter for processing fibre channel frames, comprising:
a fibre channel protocol manager (“FPM”) that includes receive logic that deletes fill words before any frame data is allowed to be stored in a buffer memory, wherein the buffer memory stores only certain primitive signals and/or frame data and the buffer memory is read without any delay, if a primitive signal is stored, while a read operation of the buffer memory involving frame data is delayed.
8. The host bus adapter of claim 7 , wherein the buffer memory is based on a first-in 0 first out system.
9. The host bus adapter of claim 7 , wherein the primitive signals include R_RDY, a BB_SC and/or a BB_SCr.
10. The host bus adapter of claim 7 , wherein delay in reading the buffer memory may be for at least three words of received data.
11. The host bus adapter of claim 7 , wherein data is re-organized to a known format before being stored in the buffer memory.
12. The host bus adapter of claim 11 , wherein certain registers are used to re-organize the data to a known format.
13. A storage area network (“SAN”) comprising:
a host bus adapter for processing fibre channel frames, including a fibre channel protocol manager (“FPM”) that includes receive logic that deletes fill words before any frame data is allowed to be stored in a buffer memory, wherein the buffer memory stores only certain primitive signals and/or frame data and the buffer memory is read without any delay, if a primitive signal is stored, while a read operation of the buffer memory involving frame data is delayed.
14. The SAN of claim 13 , wherein the buffer memory is based on a first-in-first out system.
15. The SAN of claim 13 , wherein the primitive signals include R_RDY, a BB_SC and/or a BB_SCr.
16. The SAN of claim 13 , wherein delay in reading the buffer memory may be for at least three words of received data.
17. The SAN of claim 13 , wherein data is re-organized to a known format before being stored in the buffer memory.
18. The SAN of claim 17 , wherein certain registers are used to re-organize the data to a known format.