Granted Patent B1

US 7,353,126 · App. 11/018,649 · Granted Apr 1, 2008

Abstract

Claims (70)

1. A method of determining coherent test conditions, said method comprising:

receiving constraints from a user, wherein said constraints include desired test conditions, desired tolerances for said desired test conditions, and desired instrument;

determining said coherent test conditions using said constraints, wherein said determining said coherent test conditions includes determining a calculated sampling frequency and a calculated analog frequency; and

providing each determined coherent test condition to said user, wherein each determined coherent test condition includes said calculated sampling frequency and said calculated analog frequency,

wherein said constraints include a first range of desired number of samples, wherein said desired conditions include a desired sampling frequency and a desired analog frequency, and wherein said determining said coherent test conditions comprises:

selecting a sample value from said first range;

determining a second range of integer number of cycles for coherency using said sample value, said desired sampling frequency, and said desired analog frequency;

selecting an integer value from said second range;

if said selected sample value and said selected integer value satisfy requirement for coherency, determining an ideal sampling frequency using said selected sample value, said selected integer value, and said desired sampling frequency;

using a clock divider value and said ideal sampling frequency to determine said calculated sampling frequency and said calculated analog frequency; and

retaining said calculated sampling frequency and said calculated analog frequency if fall within desired tolerances.

2. The method as recited in claim 1 wherein said using a clock divider value comprises:

selecting a clock divider value based on said desired instrument;

determining an ideal master clock frequency using said ideal sampling frequency and said selected clock divider;

determining a real master clock frequency using said ideal master clock frequency;

determining said calculated sampling frequency using said real master clock frequency and said selected clock divider; and

determining said calculated analog frequency using said selected sample value, said selected integer value, and said calculated sampling frequency.

3. The method as recited in claim 2 further comprising replacing said selected clock divider value with another clock divider value if available.

4. The method as recited in claim 1 further comprising replacing said selected integer value with another integer value if available.

5. The method as recited in claim 1 further comprising replacing said selected sample value with another sample value if available.

6. The method as recited in claim 1 wherein said constraints include a desired number of determined coherent test conditions, and wherein said method further comprises:

ending said step of determining said coherent test conditions when number of determined coherent test conditions equals desired number of determined coherent test conditions.

7. The method as recited in claim 1 wherein said step of determining said coherent test conditions using said constraints includes:

using undersampling in one or more coherent test conditions associated with capturing an analog signal.

8. A computer-readable medium comprising computer-executable instructions stored therein for implementing a method of determining coherent test conditions, said method comprising:

receiving constraints from a user, wherein said constraints include desired test conditions, desired tolerances for said desired test conditions, and desired instrument;

determining said coherent test conditions using said constraints, wherein said determining said coherent test conditions includes determining a calculated sampling frequency and a calculated analog frequency; and

providing each determined coherent test condition to said user, wherein each determined coherent test condition includes said calculated sampling frequency and said calculated analog frequency,

wherein said constraints include a first range of desired number of samples, wherein said desired conditions include a desired sampling frequency and a desired analog frequency, and wherein said determining said coherent test conditions comprises:

selecting a sample value from said first range;

determining a second range of integer number of cycles for coherency using said sample value, said desired sampling frequency, and said desired analog frequency;

selecting an integer value from said second range;

if said selected sample value and said selected integer value satisfy requirement for coherency, determining an ideal sampling frequency using said selected sample value, said selected integer value, and said desired sampling frequency;

using a clock divider value and said ideal sampling frequency to determine said calculated sampling frequency and said calculated analog frequency; and

retaining said calculated sampling frequency and said calculated analog frequency if fall within desired tolerances.

9. The computer-readable medium as recited in claim 8 wherein said using a clock divider value comprises:

selecting a clock divider value based on said desired instrument;

determining an ideal master clock frequency using said ideal sampling frequency and said selected clock divider;

determining a real master clock frequency using said ideal master clock frequency;

determining said calculated sampling frequency using said real master clock frequency and said selected clock divider; and

determining said calculated analog frequency using said selected sample value, said selected integer value, and said calculated sampling frequency.

10. The computer-readable medium as recited in claim 9 wherein said method further comprises replacing said selected clock divider value with another clock divider value if available.

11. The computer-readable medium as recited in claim 8 wherein said method further comprises replacing said selected integer value with another integer value if available.

12. The computer-readable medium as recited in claim 8 wherein said method further comprises replacing said selected sample value with another sample value if available.

13. The computer-readable medium as recited in claim 8 wherein said constraints include a desired number of determined coherent test conditions, and wherein said method further comprises:

ending said step of determining said coherent test conditions when number of determined coherent test conditions equals desired number of determined coherent test conditions.

14. A system comprising:

a processor; and

a memory unit comprising computer-executable instructions stored therein for implementing a method of determining coherent test conditions, said method comprising:

receiving constraints from a user, wherein said constraints include desired test conditions, desired tolerances for said desired test conditions, and desired instrument;

determining said coherent test conditions using said constraints, wherein said determining said coherent test conditions includes determining a calculated sampling frequency and a calculated analog frequency; and

providing each determined coherent test condition to said user, wherein each determined coherent test condition includes said calculated sampling frequency and said calculated analog frequency,

wherein said constraints include a first range of desired number of samples, wherein said desired conditions include a desired sampling frequency and a desired analog frequency, and wherein said determining said coherent test conditions comprises:

selecting a sample value from said first range;

determining a second range of integer number of cycles for coherency using said sample value, said desired sampling frequency, and said desired analog frequency;

selecting an integer value from said second range;

if said selected sample value and said selected integer value satisfy requirement for coherency, determining an ideal sampling frequency using said selected sample value, said selected integer value, and said desired sampling frequency;

using a clock divider value and said ideal sampling frequency to determine said calculated sampling frequency and said calculated analog frequency; and

retaining said calculated sampling frequency and said calculated analog frequency if fall within desired tolerances.

15. The system as recited in claim 14 wherein said using a clock divider value comprises:

selecting a clock divider value based on said desired instrument;

determining an ideal master clock frequency using said ideal sampling frequency and said selected clock divider;

determining a real master clock frequency using said ideal master clock frequency;

determining said calculated sampling frequency using said real master clock frequency and said selected clock divider; and

determining said calculated analog frequency using said selected sample value, said selected integer value, and said calculated sampling frequency.

16. The system as recited in claim 15 wherein said method further comprises replacing said selected clock divider value with another clock divider value if available.

17. The system as recited in claim 14 wherein said method further comprises replacing said selected integer value with another integer value if available.

18. The system as recited in claim 14 wherein said method further comprises replacing said selected sample value with another sample value if available.

19. The system as recited in claim 14 wherein said constraints include a desired number of determined coherent test conditions, and wherein said method further comprises:

ending said step of determining said coherent test conditions when number of determined coherent test conditions equals desired number of determined coherent test conditions.

Assignments (9)