Method of forming metal wiring of semiconductor device
View Patent ↗A method for forming a metal wiring of a semiconductor device. The method includes forming an etch stop layer on a semiconductor substrate, forming a first inter metal dielectric on the etch stop layer, and forming a second inter metal dielectric on the first inter metal dielectric. The method also includes forming a first photoresist pattern defining a via hole on the second inter metal dielectric, forming a via hole exposing the etch stop layer using the first photo resist pattern, and forming a second photoresist pattern defining a trench by exposing and developing the first photoresist pattern. The method further includes forming a trench by etching the second inter metal dielectric using the second photoresist pattern as a mask, removing the etch stop layer exposed through the via hole, and forming a metal wiring by filling the via hole and the trench.
1. A method for forming a metal wiring of a semiconductor device, comprising steps of:
forming an etch stop layer on a semiconductor substrate;
forming a first inter metal dielectric on the etch stop layer, the first inter metal dielectric being formed of an inorganic material;
forming a second inter metal dielectric on the first inter metal dielectric, the second inter metal dielectric being formed of an organic polymer material having a low permittivity;
forming a first photoresist pattern defining a via hole on the second inter metal dielectric, wherein the etching selectivity of the second inter metal dielectric to the first inter metal dielectric is high;
forming a via hole exposing the etch stop layer using the first photoresist pattern;
forming a second photoresist pattern defining a trench by exposing and developing the first photoresist pattern;
forming a trench by wet-etching the second inter metal dielectric so as to be undercut using the second photoresist pattern as a mask;
removing the etch stop layer exposed through the via hole; and
forming a metal wiring by filling the via hole and the trench.
2. The method of claim 1 , wherein the step of forming a metal wiring includes: forming a first metal layer on inner walls of the via hole and the trench; and forming a second metal layer inside the via hole and the trench defined by the first metal layer.
3. The method of claim 2 , wherein the first metal layer is made out of titanium, and the second metal layer is formed out of copper.
4. A method for forming a metal wiring of a semiconductor device, comprising:
a step for forming an etch stop layer on a semiconductor substrate;
a step for forming a first inter metal dielectric on the etch stop layer, the first inter metal dielectric being formed of an inorganic material;
a step for forming a second inter metal dielectric on the first inter metal dielectric, the second inter metal dielectric being formed of an organic polymer material having a low permittivity;
a step for forming a first photoresist pattern defining a via hole on the second inter metal dielectric, wherein the etching selectivity of the second inter metal dielectric to the first inter metal dielectric is high;
a step for forming a via hole exposing the etch stop layer using the first photoresist pattern;
a step for forming a second photoresist pattern defining a trench by exposing and developing the first photoresist pattern;
a step for forming a trench by wet-etching the second inter metal dielectric so as to be undercut using the second photoresist pattern as a mask;
a step for removing the etch stop layer exposed through the via hole; and
a step for forming a metal wiring by filling the via hole and the trench.
5. The method of claim 4 , wherein the step for forming a metal wiring includes: a step for forming a first metal layer on inner walls of the via hole and the trench; and a step for forming a second metal layer inside the via hole and the trench defined by the first metal layer.
6. The method of claim 5 , wherein the first metal layer is made out of titanium, and the second metal layer is formed out of copper.