IP Library Granted Patent US 7,189,629
Granted Patent B2
US 7,189,629 · App. 11/024,632 · Granted Mar 13, 2007

Method for isolating semiconductor devices

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Quick Facts
Patent No.
US 7,189,629
App. No.
11/024,632
Granted
Mar 13, 2007
Kind
B2
Abstract

A method of isolating semiconductor devices including forming a pad layer on a semiconductor substrate, forming a trench by etching the semiconductor substrate to a predetermined depth using the pad layer as an etch barrier, implanting ion impurities into a bottom of the trench so as to increase an oxidation rate thereat, performing heat treatment for activating ion implanted impurities, growing a liner oxide film on a bottom and a sidewall of the trench, forming an isolation film on the liner oxide film so as to fill the trench, and smoothing the isolation film.

Claims (18)

1. A method for isolating semiconductor devices, comprising the steps of:

forming a pad layer including at least one pad nitride film on a semiconductor substrate;

forming a trench by etching the semiconductor substrate to a predetermined depth using the pad layer as an etch barrier;

forming a sacrificing oxide film on a front surface including the trench;

forming a nitride sidewall on the sacrificing oxide film at a sidewall of the trench;

performing impurity ion implantation on a bottom of the trench exposed to an outside of the sidewall of the nitride film so as to increase an oxidation rate thereat;

performing heat treatment for activating implanted ion impurities;

removing the nitride sidewall and the sacrificing oxide film;

growing a liner oxide film on both the bottom and the sidewall of the trench;

forming a nitride film on the liner oxide film so as to fill the trench; and

smoothing the isolation film.

2. The method of claim 1 , wherein the step of forming a nitride sidewall comprises the steps of:

depositing the nitride film on the sacrificing oxide film; and

etching back the nitride film.

3. The method of claim 1 , wherein the step of performing impurity ion implantation includes implanting an impurity selected from n type impurity, p type impurity, and a nitride ion.

4. The method of claim 1 , wherein the step of performing impurity ion implantation includes implanting impurities with an energy in a range of about 25 to about 100 keV and a dose of impurity of about 1×10 12 cm −3 to about 1×10 18 cm −3 .

5. The method of claim 1 , wherein the trench has an inclined profile.

6. The method of claim 1 , wherein the step of removing the nitride sidewall includes removing the nitride sidewall using a phosphoric acid solution and the step of removing the sacrificing oxide film includes removing the sacrificing oxide film using hydrofluoric acid.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →