IP Library Granted Patent US 7,303,988
Granted Patent B2
US 7,303,988 · App. 11/027,035 · Granted Dec 4, 2007

Methods of manufacturing multi-level metal lines in semiconductor devices

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Quick Facts
Patent No.
US 7,303,988
App. No.
11/027,035
Granted
Dec 4, 2007
Kind
B2
Abstract

Methods of forming a multi-level metal line of a semiconductor device are disclosed. One example method includes subsequently stacking first and second metal layers, wherein a conductive etching stopper layer is interposed at an interface between the first and second metal layers; forming first and second metal layer pattern by patterning the first metal layer, the etching stopper layer, and the second metal layer, wherein the first metal layer pattern is formed as a lower metal line; forming a connection contact in form of a plug by selectively etching the second metal layer pattern until the etching stopper layer is exposed; forming an interlayer insulating layer to cover the connection contact and the first metal layer pattern; and exposing an upper surface of the connection contact by planarizing the interlayer insulating layer.

Claims (25)

1. A method of forming multi-level metal lines of a semiconductor device, comprising:

sequentially stacking a first metal layer, a conductive etching stopper layer, a second metal layer, and an anti-reflection coating layer;

forming first and second metal layer patterns by patterning the first metal layer, the conductive etching stopper layer, the second metal layer, and the anti-reflection coating layer, wherein the first metal layer pattern forms a lower metal line;

forming a connection contact by selectively etching the second metal layer pattern until the etching stopper layer is exposed;

forming an insulating layer to cover the connection contact and the first metal layer pattern; and

exposing an upper surface of the connection contact by planarizing the insulating layer.

2. The method of claim 1 , wherein the first metal layer comprises aluminum (Al).

3. The method of claim 1 , wherein the first metal layer comprises copper (Cu) or tungsten (W).

4. The method of claim 1 , wherein the first and second metal layers comprise a same metal.

5. The method of claim 1 , further comprising, before sequentially stacking the first metal layer, the conductive stopper layer, the second metal layer, and the anti-reflection coating layer, forming a conductive diffusion barrier metal layer comprising a titanium (Ti) layer, a titanium nitride (TiN) layer, tantalum (Ta) layer, a tantalum nitride (TaN), or a multi-level layer thereof.

6. The method of claim 1 , wherein the anti-reflection coating layer comprises a titanium (Ti) layer, a titanium nitride (TiN) layer, tantalum (Ta) layer, a tantalum nitride (TaN) layer or a multi-level layer thereof.

7. The method of claim 1 , wherein the etching stopper layer comprises a titanium (Ti) layer, a titanium nitride (TiN) layer, a tantalum (Ta) layer, a tantalum nitride (TaN) layer, or a multi-level layer thereof.

8. The method of claim 1 , wherein forming the connection contact comprises:

forming a negative-type photoresist pattern on the second metal layer pattern to mask portions thereof where connection contacts are formed; and

etching the second metal layer pattern using the photoresist pattern as an etching mask until the etching stopper layer is exposed.

9. The method of claim 1 , further comprising forming a planarization stopper layer on the connection contact, wherein the planarization stopper layer comprises silicon nitride (SiN), silicon oxide nitride (SiON), silicon carbide (SiC), or silicon carbon nitride (SiCN).

10. The method of claim 1 , wherein the second metal layer comprises aluminum (Al).

11. The method of claim 1 , wherein the first and second metal layers comprise aluminum (Al).

12. The method of claim 1 , wherein the second metal layer comprises copper (Cu) or tungsten (W).

13. The method of claim 1 , wherein the second metal layer comprises tungsten (W).

14. The method of claim 1 , wherein the first and second metal layers comprise copper (Cu).

15. The method of claim 1 , wherein forming the first and second metal layer patterns comprises forming a first photoresist pattern on the anti-reflection coating layer.

16. The method of claim 15 , wherein forming to first and second metal layer patterns further comprises patterning the anti-reflection coating layer, the second metal layer, the conductive etching stopper layer, and the first metal layer by dry etching, using the first photoresist pattern.

17. The method of claim 1 , wherein forming the second metal layer pattern comprises forming a second photoresist pattern on portions of the anti-reflection coating layer.

18. The method of claim 17 , wherein forming the second metal layer pattern further comprises patterning the anti-reflection coating layer and the second metal layer by dry etching, using the second photoresist pattern as a mask, until the etching stopper layer is exposed.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041363/0644 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017749 FRAME 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 21, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017821/0670 →
CHANGE OF NAME Recorded Jun 8, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017749/0335 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2004
From: SHIM, SANG CHUL
To: DONGBUANAM SEMICONDUCTOR, INC., A KOREAN CORPORATION
Reel/Frame 016159/0488 →