IP Library Granted Patent US 7,432,569
Granted Patent B1
US 7,432,569 · App. 11/068,222 · Granted Oct 7, 2008

FET gate structure and fabrication process

Assignee: Trnaslucent, Inc.
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Quick Facts
Patent No.
US 7,432,569
App. No.
11/068,222
Granted
Oct 7, 2008
Kind
B1
Abstract

The invention includes a method of fabricating a gate structure for a field effect transistor and the gate structure. The method includes providing a crystalline silicon substrate and epitaxially growing a gate insulating layer of crystalline rare earth insulating material on the crystalline silicon substrate. A gate stack of crystalline silicon is then epitaxially grown on the layer of crystalline rare earth insulating material and doped to provide a desired type of conductivity. The gate insulating layer and the gate stack are etched and a metal electrical contact is deposited on the epitaxially grown gate stack of crystalline silicon to define a gate structure.

Claims (13)

1. A gate structure for semiconductor components comprising:

a crystalline semiconductor substrate, the substrate having an orientation of one of (111), (001), (110), and miscut between 1-6 degrees;

a gate insulating layer of epitaxially grown crystalline rare earth insulator material on the crystalline semiconductor substrate, the gate insulating layer having a thickness in a range of a few angstroms to 100 angstroms;

a gate stack of crystalline semiconductor material on the layer of epitaxially grown crystalline rare earth insulator material, the gate stack of crystalline semiconductor material being doped to provide a desired type of conductivity; and

a metal electrical contact on the gate stack.

2. A gate structure for semiconductor components as claimed in claim 1 wherein the crystalline semiconductor substrate includes a crystalline silicon substrate.

3. A gate structure for semiconductor components as claimed in claim 2 wherein the crystalline semiconductor substrate includes a crystalline silicon substrate with silicon-on-insulator construction.

4. A gate structure for semiconductor components as claimed in claim 1 wherein the gate insulating layer of crystalline rare earth insulating material includes one of erbium and ytterbium.

5. A gate structure for semiconductor components as claimed in claim 1 wherein the gate stack of crystalline semiconductor material includes crystalline silicon.

6. A gate structure for semiconductor components as claimed in claim 5 wherein the gate stack of crystalline semiconductor material is doped with boron.

7. A gate structure for semiconductor components as claimed in claim 1 wherein the gate structure is included in a field effect transistor.

8. A gate structure for semiconductor components as claimed in claim 7 wherein the field effect transistor further includes a source area and a drain area in the substrate on opposite sides of the gate structure.

9. A gate structure for semiconductor components as claimed in claim 1 wherein the epitaxially grown crystalline rare earth insulator material includes one of rare earth oxide, rare earth nitride, and rare earth oxynitride.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2018
From: TRANSLUCENT INC.
To: IQE PLC
Reel/Frame 046329/0511 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2005
From: ATANACKOVIC, PETAR B.
To: TRANSLUCENT INC.
Reel/Frame 016817/0320 →