Proportional settling time adjustment for diode voltage and temperature measurements dependent on forced level current
View Patent ↗A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (ΔV BE ) proportional to the temperature of the diode is captured and provided to an analog to digital converter (ADC), which may perform required signal conditioning functions on ΔV BE , and provide a digital output corresponding to the temperature of the diode. DC components of errors in the measured temperature that may result from EMI noise modulating the junction voltage (V BE ) may be minimized through the use of a front-end sample-and-hold circuit coupled between the diode and the ADC, in combination with a shunt capacitor coupled across the diode junction. The sample-and-hold-circuit may sample V BE at a frequency that provides sufficient settling time for each V BE sample, and provide corresponding stable ΔV BE samples to the ADC at the ADC operating frequency. The ADC may therefore be operated at its preferred sampling frequency rate without incurring reading errors while still averaging out AC components of additional errors induced by sources other than EMI.
1. A system comprising:
a sampler circuit having input terminals and output terminals, wherein the input terminals are configured to couple to corresponding terminals of a semiconductor device, the semiconductor device having a specified, substantially non-linear input-output characteristic that varies with temperature and being subject to effects of electromagnetic interference (EMI); and
a converter circuit configured to operate at a first frequency and having input ports configured to couple to the output terminals of the sampler circuit;
wherein the sampler circuit is operable to sample output signals generated by the semiconductor device to generate specified signals corresponding to the output signals:
wherein for each respective one of the specified signals, the sampler circuit is operable to provide to the converter circuit the respective one of the specified signals a plurality of times during a specified time period that is longer than a period corresponding to the first frequency;
wherein the converter circuit is operable to receive the specified signals from the sampler circuit, and produce a numeric value based on an average of the received specified signals, wherein the numeric value corresponds to a temperature of the semiconductor device.
2. The system of claim 1 , wherein the sampler circuit comprises a pair of operational amplifiers (op-amps), wherein the input terminals of the sampler circuit are configured to couple respective inputs of each op-amp to the corresponding terminals of the semiconductor device, and the output terminals are configured to couple respective outputs of each op-amp to the input ports of the converter circuit, and wherein during each current specified time period:
one of the op-amps is operable to generate a next respective one of the specified signals concurrently with the other op-amp providing to the converter circuit a current respective one of the specified signals generated during an immediately preceding specified time period.
3. The system of claim 1 , further comprising one or more input devices operable to successively provide to the semiconductor device during each specified time period at least a first input signal and a second input signal that differ in magnitude, wherein the output signals comprise a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal;
wherein the first output signal has a settling time inversely proportional to a magnitude of the first input signal and the second output signal has a settling time inversely proportional to a magnitude of the second input signal; and
wherein the specified time period is substantially equivalent to a sum of the settling time of the first output signal and the settling time of the second output signal.
4. The system of claim 3 , wherein each of the specified signals has a magnitude substantially equivalent to a magnitude difference between the first output signal and the second output signal.
5. The system of claim 3 , wherein the one or more input devices comprise one or more current sources, wherein the first input signal and the second input signal comprise current signals, wherein the semiconductor device comprises a base-emitter junction, wherein each of the output signals is a base-emitter voltage (VBE) signal developed across the base-emitter junction, and wherein each of the specified signals is a voltage difference between two successive VBE signals (ΔVBE).
6. The system of claim 5 , wherein the base-emitter junction is comprised in one of:
a diode; and
a bipolar junction transistor (BJT).
7. The system of claim 1 , wherein the semiconductor device is one of:
a diode; and
a BJT;
wherein the output signals are VBE signals, and wherein the specified signals are ΔVBE signals.
8. The system of claim 1 , wherein the converter circuit is an analog to digital converter (ADC).
9. The system of claim 8 , wherein the ADC is a delta-sigma ADC comprising a switched capacitor integrator configured to generate the average of the received specified signals.
10. The system of claim 1 , wherein during each specified time period, the sampler circuit is operable to provide to the converter circuit an inverse of the respective one of the specified signals a plurality of times.
11. The system of claim 10 , wherein during each specified time period, the sampler circuit is operable to alternately provide the respective one of the specified signals and the inverse of the respective one of the specified signals to the converter circuit a plurality of times.
12. The system of claim 1 , further comprising a shunting element coupled across the input terminals of the sampler circuit;
wherein the numeric value is substantially free of errors due to the effects of EMI and the effects of noise generated by the sampler circuit, the shunting element, and/or components of the converter circuit.
13. The system of claim 12 , wherein the shunting element is a capacitor.
14. A system comprising:
a semiconductor device having terminals and a specified, substantially non-linear input-output characteristic that varies with temperature and being subject to effects of electromagnetic interference (EMI);
one or more input devices operable to successively provide to the semiconductor device during each of a plurality of respective time periods at least a first input signal and a second input signal that differ in magnitude;
a sampler circuit having input terminals and output terminals, wherein the input terminals are configured to couple to corresponding ones of the terminals of the semiconductor device;
a shunting element coupled across the input terminals of the sampler circuit to substantially reduce the effects of EMI on the semiconductor device; and
a converter circuit configured to operate at a first frequency and having input ports configured to couple to the output terminals of the sampler circuit;
wherein the sampler circuit is operable to sample respective output signals generated by the semiconductor device in response to the first input signal and the second input signal, to generate specified signals corresponding to the respective output signals:
wherein for each respective one of the specified signals, the sampler circuit is operable to provide to the converter circuit the respective one of the specified signals a plurality of times during a specified time period that is longer than a period corresponding to the first frequency;
wherein the converter circuit is operable to receive the specified signals from the sampler circuit, and produce a numeric value based on an average of the received specified signals, wherein the numeric value corresponds to a temperature of the semiconductor device; and
wherein the numeric value is substantially free of errors due to the effects of EMI and the effects of noise generated by the sampler circuit, the shunting element, and/or components of the converter circuit.
15. A system comprising:
a base-emitter junction being subject to effects of electromagnetic interference (EMI);
one or more current sources operable to successively provide to the base-emitter junction during each of a plurality of respective time periods at least a first current and a second current that differ in magnitude;
a sampler circuit having input terminals and output terminals, wherein the input terminals are configured to couple to corresponding terminals of the base-emitter junction;
a capacitor coupled across the input terminals of the sampler circuit; and
an ADC configured to operate at a first frequency and having input ports configured to couple to the output terminals of the sampler circuit;
wherein the sampler circuit is operable to sample respective VBE signals developed across the base-emitter junction in response to the first current and the second current, and generate ΔVBE signals corresponding to the respective VBE signals, wherein for each of the plurality of respective time periods:
the sampler circuit is operable to alternately provide a respective one of the ΔVBE signals and an inverse of the respective one of the ΔVBE signals to the ADC at a rate substantially equivalent to the first frequency;
wherein the ADC is operable to receive the ΔVBE and inverse ΔVBE signals from the sampler circuit, and produce a numeric value based on an average of the received ΔVBE and inverse ΔVBE signals, wherein the numeric value corresponds to a temperature of the base-emitter junction; and
wherein the numeric value is substantially free of errors due to the effects of EMI and the effects of noise generated by the sampler circuit, the capacitor, and/or components of the ADC.