IP Library Granted Patent US 7,422,979
Granted Patent B2
US 7,422,979 · App. 11/078,236 · Granted Sep 9, 2008

Method of forming a semiconductor device having a diffusion barrier stack and structure thereof

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Quick Facts
Patent No.
US 7,422,979
App. No.
11/078,236
Granted
Sep 9, 2008
Kind
B2
Abstract

A diffusion barrier stack is formed by forming a layer comprising a metal over a conductor that includes copper; and forming a first dielectric layer over the layer, wherein the dielectric layer is of a thickness that alone it can not serve as a diffusion barrier layer to the conductor and the first dielectric layer prevents oxidation of the layer. In one embodiment, the diffusion barrier stack includes two layers; the first layer is a conductive layer and the second layer is a dielectric layer. The diffusion barrier stack minimizes electromigration and copper diffusion from the conductor.

Claims (34)

1. A method of forming a semiconductor device, the method comprising steps of:

providing a semiconductor substrate;

forming a conductor over the semiconductor substrate, wherein the conductor comprises copper;

forming a diffusion barrier stack over the conductor, wherein forming the diffusion barrier stack comprises:

forming a layer comprising a metal over the conductor, wherein the layer comprises a first element, a second element, and a third element, wherein:

the first element is cobalt (Co) or nickel (Ni)

the second element is tungsten (W), rhenium (Re) or molybdenum (Mo), and

the third element is boron (B) or phosphorous (P);

forming a first dielectric layer substantially devoid of oxygen over the layer, wherein forming the first dielectric layer further comprises forming a first dielectric layer having a thickness less than 20 nanometers, wherein the first dielectric layer has dielectric constant that is less than the dielectric constant of stoichiometric silicon nitride, and wherein:

when forming the first dielectric layer, the layer comprising the metal has a substantially uniform thickness between the conductor and the first dielectric layer; and

the first dielectric layer is of a thickness that alone it can not serve as a diffusion barrier layer to the conductor; and

forming a second dielectric layer over the diffusion barrier stack, wherein the second dielectric layer includes silicon carbide nitride (SiCN).

2. The method of claim 1 , wherein forming the layer, further comprises selectively depositing the layer.

3. The method of claim 1 , wherein the first dielectric layer comprises an element selected from the group consisting of silicon, nitrogen and carbon.

4. The method of claim 1 , further comprising removing at least a portion of the diffusion barrier stack.

5. A method of forming a semiconductor device, the method comprising steps of:

providing a semiconductor substrate;

forming a first dielectric layer over the semiconductor substrate, wherein forming the first dielectric layer further comprises forming a first dielectric layer having a thickness less than 20 nanometers, and wherein the first dielectric layer has dielectric constant that is less than the dielectric constant of stoichiometric silicon nitride;

patterning the first dielectric layer to form a first opening having a sidewall;

forming a conductor material in the first opening, wherein the conductor comprises copper;

polishing the conductor material to form a conductor, wherein an uppermost point of the side of the conductor lies at substantially the same elevation as an uppermost point of the conductor;

forming an electromigration reduction layer over the conductor, wherein the

electromigration reduction layer includes a first element, a second element, and a third element, wherein:

the first element is cobalt (Co) or nickel (Ni);

the second element is tungsten (W), rhenium (Re) or molybdenum (Mo), and

the third element is boron (B) or phosphorous (P); and

forming a second dielectric layer over the electromigration reduction layer and the first dielectric layer, wherein the second dielectric layer includes silicon carbide nitride (SiCN).

6. The method of claim 5 , further comprising

removing a portion of the second dielectric layer to form a second opening; and

forming a via over the conductor in the second opening.

7. The method of claim 6 , further comprising removing a portion of the electromigration reduction layer.

8. The method of claim 5 , wherein forming the electromigration reduction layer, further comprises selectively depositing the layer.

9. The method of claim 5 , further comprising forming a second dielectric layer over the diffusion barrier stack.

10. The method of claim 5 , wherein the first dielectric layer comprises an element selected from the group consisting of silicon, nitrogen and carbon.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →