Digital time constant tracking technique and apparatus
View Patent ↗Methods and apparatus are provided for tuning out time constant deviations of a network ( 414 ) due to process, voltage, and temperature variations. The apparatus ( 400 ) comprises a clock reference ( 404 ) from which a digital time constant is correlated to the nominal time constant of the network ( 414 ). The correlated digital time constant is applied to the network ( 414 ), and the output charge/discharge waveform swing is compared to a predetermined reference voltage. If the charge/discharge waveform swing does not match the reference voltage, an offset signal is generated. The offset signal is applied to a control circuit ( 402 ) that generates a corresponding tuning signal. The tuning signal is applied to the network ( 414 ) to adjust the internal components incrementally until a match is achieved. The apparatus ( 400 ) can be configured as a built-in self-test digital time constant tracking circuit, and can be integrated with the network ( 414 ) on an IC chip.
1. A method of tuning out time constant variations in a network, comprising the steps of:
deriving a digital time constant pulse having a width correlated to the nominal time constant of the network;
processing the digital time constant pulse through the network and measuring the output voltage waveform of the network;
comparing the voltage swing of the output voltage waveform to a predetermined reference voltage during each digital time constant pulse time period;
generating a tune signal when the voltage swing of the output voltage waveform does not equal or exceed the level of the predetermined reference voltage, and generating a stop signal when the voltage swing of the output voltage waveform does equal or exceed the level of the predetermined reference voltage;
converting the tune signal into a compensation signal for adjusting the time constant of the network; and
adjusting the time constant of the network with the compensation signal so that the voltage swing of the output voltage waveform is substantially equal to the predetermined reference voltage.
2. The method of claim 1 wherein the network is single-ended or differential.
3. The method of claim 1 wherein the network comprises resistive, capacitive, and inductive components.
4. A digital time constant tracking circuit for tuning out time constant variations of a resistor-capacitor (RC) network, comprising:
a clock reference standard configured to generate digital time constant pulses having a pulse width correlated to the nominal time constant of the RC network;
a resistor array and a capacitor array within the RC network configured to receive the digital time constant pulses from the clock reference standard and to output a charge/discharge waveform in time synchronism with the received digital time constant pulses;
a comparator configured to receive the charge/discharge waveform from the RC network at a first input, and to receive a predetermined reference voltage at a second input, and to generate a tune signal when the voltage swing of the charge/discharge waveform does not equal or exceed the level of the predetermined reference voltage, and to generate a stop signal when the voltage swing of the charge/discharge waveform does equal or exceed the level of the predetermined reference voltage; and
a control circuit configured to receive the tune and stop signals from the comparator, and to generate an output tuning signal corresponding to a received tune signal, wherein the output tuning signal is applied to the resistor and capacitor arrays in the RC network to adjust the time constant of the RC network so that the voltage swing of the charge/discharge waveform is substantially equal to the predetermined reference voltage.
5. The digital time constant tracking circuit of claim 4 wherein the clock reference standard is a crystal oscillator.
6. The digital time constant tracking circuit of claim 4 wherein the predetermined reference voltage is derived from a precision resistor ladder.
7. The digital time constant tracking circuit of claim 4 wherein the digital time constant tracking circuit is configured as a built-in self test system.
8. The digital dine constant tracking circuit of claim 4 wherein the comparator is configured to receive the clock reference standard at a third input, and to generate a tune or a stop signal at a rate synchronized to the frequency of the clock reference standard.
9. The digital time constant tracking circuit of claim 4 wherein the RC network is single-ended or differential.
10. The digital time constant tracking circuit of claim 7 wherein the RC network is configurable to be tuned at any time.
11. The digital time constant tracking circuit of claim 10 wherein variations in environmental factors corresponding to the RC network timing changes are computed.
12. The digital time constant tracking circuit of claim 11 wherein trends in component behavior of the RC network are monitored.
13. A digital time constant tracking circuit for stabilizing the time constant and corresponding bandwidth of a filter network, comprising:
a clock reference standard configured to generate digital time constant pulses having a pulse width correlated to the nominal time constant of the filter network;
a component array within the filter network configured to receive the digital time constant pulses from the clock reference standard and to generate an output voltage waveform in time synchronism with the received digital time constant pulses;
a comparator configured to receive the output voltage waveform from the filter network at a first input, and to receive a predetermined reference voltage at a second input, and to generate a tune signal when the voltage swing of the output voltage waveform does not equal or exceed the level of the predetermined reference voltage, and to generate a stop signal when the voltage swing of the output voltage waveform does equal or exceed the level of the predetermined reference voltage; and
a control circuit configured to receive the tune and stop signals from the comparator, and to generate an output tuning signal corresponding to a received tune signal, wherein the output tuning signal is applied to the component array in the filter network to adjust the time constant of the filter network so that the voltage swing of the output voltage waveform is substantially equal to the predetermined reference voltage, thereby stabilizing the time constant and the corresponding bandwidth of the filter network.
14. The digital time constant tracking circuit of claim 13 wherein the clock reference standard is a crystal oscillator.
15. The digital time constant tracking circuit of claim 13 wherein the predetermined reference voltage is derived from a precision resistor ladder.
16. The digital time constant tracking circuit of claim 13 wherein the digital time constant tracking circuit is configured as a built-in self-test system.
17. The digital time constant tracking circuit of claim 13 wherein the comparator is configured to receive the clock reference standard at a third input and to generate a tune or a stop signal at a rate synchronized to the frequency of the clock reference standard.
18. The digital time constant tracking circuit of claim 13 wherein the filter network is single-ended or differential.
19. The digital time constant tracking circuit of claim 13 wherein the filter network comprises resistive, capacitive, and inductive components.
20. The digital time constant tracking circuit of claim 16 wherein variations in environmental factors corresponding to the filter network tuning changes are computed.