IP Library Granted Patent US 7,241,691
Granted Patent B2
US 7,241,691 · App. 11/092,469 · Granted Jul 10, 2007

Conducting metal oxide with additive as p-MOS device electrode

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Quick Facts
Patent No.
US 7,241,691
App. No.
11/092,469
Granted
Jul 10, 2007
Kind
B2
Abstract

Methods for fabricating high work function p-MOS device metal electrodes are provided. In one embodiment, a method is provided for producing a metal electrode including the steps of: providing a high k dielectric stack with an exposed surface; contacting the exposed surface of the high k dielectric stack with a vapor of a metal oxide wherein the metal oxide is selected from the group consisting of RuO x , IrO x , ReO x , MoO x , WO x , VO x , and PdO x ; and contacting the exposed surface of the dielectric stack with a vapor of an additive selected from the group consisting of SiO 2 , Al 2 O 3 , HfO 2 , ZrO 2 , MgO, SrO, BaO, Y 2 O 3 , La 2 O 3 , and TiO 2 , whereby contacting the exposed surface of the dielectric stack with the vapor of the metal oxide and the vapor of the additive forms an electrode and wherein the additive is present at an amount between about 1% to about 50% by atomic weight percent in the electrode.

Claims (20)

1. A method for forming a metal electrode comprising:

providing a high k dielectric stack with an exposed surface;

contacting the exposed surface of the high k dielectric stack with a vapor of a metal oxide wherein the metal oxide comprises a material selected from the group consisting of RuO x , IrO y , ReO z , MoO a , WO b , VO x , and PdO c ; where each of x, y, z, a, b, and c are real numbers; and

contacting the exposed surface of the dielectric stack with a vapor of an additive selected from the group consisting of SiO 2 , Al 2 O 3 , HfO 2 , ZrO 2 , MgO, SrO, BaO, Y 2 O 3 , La 2 O 3 , and TiO 2 , whereby contacting the exposed surface of the dielectric stack with the vapor of the metal oxide and the vapor of the additive forms an electrode and wherein the additive is present at an amount between about 1% to about 50% by atomic percent in the electrode.

2. The method of claim 1 wherein contacting the exposed surface of the dielectric stack with a vapor of a metal oxide contacting the exposed surface of the dielectric stack with a vapor of an additive further comprises a physical vapor deposition selected from the group consisting of ebeam, sputtering, and pulsed laser deposition.

3. The method of claim 1 wherein contacting the exposed surface of the dielectric stack with a vapor of a metal oxide and contacting the exposed surface of the dielectric stack with a vapor of an additive further comprises forming an electrode having an additive present at an amount of between about 5% to about 20% by atomic percent.

4. The method according to claim 1 wherein contacting the exposed surface of the dielectric stack with a vapor of a metal oxide and contacting the exposed surface of the dielectric stack with a vapor of an additive further comprises forming an electrode that remains substantially stable at temperatures up to approximately 1000° C.

5. The method according to claim 1 further comprising forming the electrode in a CMOS device.

6. The method according to claim 1 further comprising forming the electrode as a p-MOS device electrode metal structure.

7. The method according to claim 1 further comprising forming the electrode with a surface work function greater than approximately 5 eV.

8. The electrode according to claim 1 wherein the electrode comprises a uniform mixture of host conducting metal oxide and additive made by PVD and MOCVD methods.

9. The method according to claim 1 further comprising forming the electrode as a gate electrode.

10. A method of tuning the work function of an electrode comprising:

providing a high k dielectric stack with an exposed surface;

contacting the exposed surface of the high k dielectric stack with a vapor of a metal oxide wherein the metal oxide is selected from the group consisting of RuO x , IrO x , ReO x , MoO x , WO x , VO x , and PdO x ;

contacting the exposed surface of the dielectric stack with a vapor of an additive selected from the group consisting of SiO 2 , Al 2 O 3 , HfO 2 , ZrO 2 , MgO, SrO, BaO, Y 2 O 3 , La 2 O 3 , and TiO 2 ;

maintaining contact between the exposed surface of the high k dielectric stack and the vapor of metal oxide and the vapor of additive so as to form an electrode wherein the additive is present at an amount between about 1% to about 50% by atomic percent in the electrode; and

controlling the amount of additive present in the electrode so as to produce a desired work function.

11. The method according to claim 10 wherein controlling the amount of additive present further comprises controlling the amount of additive present in the electrode so as to produce a work function of at least 5 eV.

12. The method according to claim 10 further comprising providing a high k dielectric stack with a set k value and a producing an electrode with a desired work function so that the combined dielectric stack and electrode have a electrical work function of between about 5.0 eV and about 5.4 eV.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0704 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 16, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 020518/0215 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2005
From: LIANG, YONG; TRACY, CLARENCE J.
To: FREESCALE SEMICONDUCTOR, INC.
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