IP Library › Granted Patent US 7,199,465
Granted Patent B2
US 7,199,465 · App. 11/100,642 · Granted Apr 3, 2007

Wire bonding system and method of use

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,199,465
App. No.
11/100,642
Granted
Apr 3, 2007
Kind
B2
Abstract

A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.

Claims (25)

1. A multi-chip package (MCP) wire bonding system, comprising:

a semiconductor chip structure mounted on a printed circuit board, the semiconductor chip structure including a semiconductor chip having an overhang portion that is not supported by the printed circuit board, the overhang portion extending to an edge of the semiconductor chip; and

a heating block positioned below the printed circuit board,

wherein the heating block includes a support formed in a predetermined region of the heating block, the support sized and shaped to extend through an opening in the printed circuit board to support the overhang portion of the semiconductor chip during a wire bonding process.

2. The system of claim 1 , wherein the semiconductor chip structure includes at least two stacked semiconductor chips, wherein an upper semiconductor chip of the at least two semiconductor chips includes the overhang portion, wherein the overhang portion is not supported by a lower semiconductor chip of the at least two semiconductor chips.

3. The system of claim 1 , wherein the support is substantially parallelepiped in shape.

4. The system of claim 1 , wherein the support is substantially cylindrical in shape.

5. The system of claim 1 , wherein the heating block includes a vacuum line for producing a vacuum pressure at a lower surface of the printed circuit board.

6. The system of claim 5 , wherein the heating block includes a vacuum line in the support for producing a vacuum pressure at a supported surface of the semiconductor chip.

7. A multi-chip package (MCP) wire bonding system, comprising:

a plurality of stacks of semiconductor chips mounted on a printed circuit board, wherein each stack of semiconductor chips includes at least two semiconductor chips and an upper semiconductor chip having an overhang portion not supported by a lower semiconductor chip; and

a heating block positioned below the printed circuit board for heating the printed circuit board and stacks of semiconductor chips during a wire bonding process,

wherein the heating block includes a plurality of supports with each support sized and shaped to extend through a corresponding opening in the printed circuit board to support the overhang portion of an upper semiconductor chip.

8. The system of claim 7 , wherein each stack of semiconductor chips includes a first semiconductor chip mounted on the printed circuit board and a second semiconductor chip attached to the first semiconductor chip, the second semiconductor chip being larger than the first semiconductor chip.

9. The system of claim 7 , wherein each support is substantially parallelepiped in shape.

10. The system of claim 7 , wherein each support is substantially cylindrical in shape.

11. The system of claim 7 , wherein the heating block includes a vacuum line for producing a vacuum pressure at a lower surface of the printed circuit board.

12. The system of claim 11 , wherein the heating block includes a vacuum line in each support for producing a vacuum pressure at the supported overhang portion of each upper semiconductor chip.

13. A multi-chip package (MCP) wire bonding system, comprising:

a semiconductor chip structure mounted on a printed circuit board, wherein the semiconductor chip structure includes at least two stacked semiconductor chips, wherein an upper semiconductor chip of the at least two semiconductor chips includes an overhang portion not supported by a lower semiconductor chip of the at least two semiconductor chips; and

a heating block positioned below the printed circuit board, wherein the heating block includes a support formed in a predetermined region of the heating block, the support sized and shaped to extend through an opening in the printed circuit board to support the overhang portion of the upper semiconductor chip during a wire bonding process.

14. The system of claim 13 , wherein the support is substantially parallelepiped in shape.

15. The system of claim 13 , wherein the support is substantially cylindrical in shape.

16. The system of claim 13 , wherein the heating block includes a vacuum line for producing a vacuum pressure at a lower surface of the printed circuit board.

17. The system of claim 16 , wherein the heating block includes a vacuum line in the support for producing a vacuum pressure at a supported surface of the semiconductor chip.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2005
From: LIM, WON-CHUL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 016275/0329 →
Priority Claims (1)
KR 10-2004-0028634 · Apr 26, 2004 · national
Continuity (1)
Related Publication 20050236705A1 · Oct 27, 2005