Semiconductor device and method for regional stress control
View Patent ↗Mechanical stress control may be achieved using materials having selected elastic moduli. These materials may be selectively formed by implantation, may be provided as a plurality of buried layers interposed between the substrate and the active area, and may be formed by replacing selected portions of one or more buried layers. Any one or more of these methods may be used in combination. Mechanical stress control may be useful in the channel region of a semiconductor device to maximize its performance. In addition, these same techniques and structures may be used for other purposes besides mechanical stress control.
1. A method for controlling stress in a semiconductor device comprising:
providing a substrate;
forming a dielectric layer overlying the substrate and in contact with the substrate, the dielectric layer comprising a first region having a first elastic modulus and a second region having a second elastic modulus that differs from the first elastic modulus;
forming a semiconductor layer overlying and in contact with the dielectric layer;
forming an active device having a portion that is formed within the semiconductor layer and overlying the first region of the dielectric layer, wherein the first elastic modulus has a value to optimize stress in an element of the active device.
2. The method of claim 1 further comprising:
forming the active device as a first transistor of a first conductivity type;
forming a second transistor of a second conductivity type opposite the first conductivity type and overlying a third region of the dielectric layer, the third region of the dielectric layer having a third elastic modulus substantially equal to the first elastic modulus;
implanting the first region of the dielectric layer and the third region of the dielectric layer to increase the first elastic modulus and the third elastic modulus to reduce compressive stress or increase tensile stress of channel regions of both the first transistor and the second transistor.
3. The method of claim 1 wherein forming the first region of the dielectric layer further comprises:
delineating the first region of the dielectric layer by masking the semiconductor device to expose the first region;
implanting a predetermined amount of at least one of boron, phosphorous or nitrogen or a combination of boron and phosphorous into the semiconductor device to modify the first elastic modulus and thereby either reduce compressive stress or increase tensile stress in the active device.
4. The method of claim 3 further comprising:
delineating the second region of the dielectric layer by masking the semiconductor device to expose the second region; and
implanting a predetermined amount of at least one of boron, phosphorous or nitrogen or a combination of boron and phosphorous into the semiconductor device to modify the second elastic modulus and thereby either reduce compressive stress or increase tensile stress in a second active device overlying the second region.
5. The method of claim 4 further comprising:
forming the active device as a P-channel transistor and forming the second active device as an N-channel transistor; and
separating the P-channel transistor from the N-channel transistor by a third region comprising a third elastic modulus that differs from the first elastic modulus and the second elastic modulus.
6. The method of claim 4 further comprising:
optimizing stress in a channel of the second active device by increasing tensile stress in the channel of the second active device.
7. The method of claim 1 further comprising:
optimizing stress in the element of the active device by increasing compressive stress in the element of the active device.
8. A method for regional control of stress in a semiconductor device comprising:
providing a substrate;
forming a buried oxide layer overlying the substrate;
forming a semiconductor layer overlying the buried oxide layer;
masking the semiconductor device to delineate a first region of the buried oxide layer;
implanting the semiconductor device with one of a boron implant species, a phosphorous implant species or a boron/phosphorous implant species to modify an elastic modulus of the first region of the buried oxide layer;
masking the semiconductor device to delineate a second region of the buried oxide layer;
implanting the semiconductor device with a nitrogen implant species to modify an elastic modulus of the second region of the buried oxide layer;
forming shallow trench isolation regions around portions of the semiconductor layer overlying the first region of the buried oxide layer and the second region of the buried oxide layer; and
forming first and second transistors respectively overlying the first region of the buried oxide layer and the second region of the buried oxide layer, the first region of the buried oxide layer and the second region of the buried oxide layer comprising different elastic moduli to optimize stress in each of the first and second transistors.
9. The method of claim 8 further comprising:
separating the first region of the buried oxide layer from the second region of the buried oxide layer by a third region of the buried oxide layer underlying the shallow trench isolation regions, the third region of the buried oxide layer not having an elastic constant thereof modified by implanting the semiconductor device.
10. The method of claim 8 wherein implanting the semiconductor device with the boron implant species, a phosphorous implant species or a boron/phosphorous implant species further comprises annealing the semiconductor device to respectively form BSG (boron silicate glass), PSG (phosphorous silicate glass) or BPSG (boron phosphorous silicate glass) having a lower elastic modulus than prior to the implanting.
11. The method of claim 10 wherein the lower elastic modulus is determined in part by specifying concentration of implant species.
12. The method of claim 8 wherein implanting the semiconductor device with the nitrogen implant species further comprises annealing the semiconductor device to form silicon oxynitride (SiO x N y ) having a larger elastic modulus than prior to the implanting.
13. The method of claim 12 wherein the larger elastic modulus is determined in part by specifying concentration of the nitrogen implant species.
14. A method for forming a first semiconductor device and a second semiconductor device, the method comprising:
forming a buried oxide layer overlying a substrate;
forming a semiconductor layer overlying the buried oxide layer;
implanting a first region of the buried oxide layer with a first implant species to modify an elastic modulus of the first region of the buried oxide layer;
implanting a second region of the buried oxide layer with a second implant species to modify an elastic modulus of the second region of the buried oxide layer;
forming isolation regions around portions of the semiconductor layer overlying the first region of the buried oxide layer and the second region of the buried oxide layer;
forming the first semiconductor device overlying the first region of the buried oxide layer; and
forming the second semiconductor device overlying the second region of the buried oxide layer.
15. A method as in claim 14 , wherein the first implant species comprises at least one of a group consisting of nitrogen and carbon.
16. A method as in claim 15 , wherein the second implant species comprises at least one of a group consisting of boron and phosphorus.
17. The method of claim 14 wherein a concentration of the first implant species is in a range of 1E19 to 5E22 atoms per cubic centimeter.
18. The method of claim 17 wherein a concentration of the second implant species is in a range of 1E19 to 5E22 atoms per cubic centimeter.