IP Library Granted Patent US 7,296,195
Granted Patent B2
US 7,296,195 · App. 11/120,368 · Granted Nov 13, 2007

Bit synchronization for high-speed serial device testing

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Quick Facts
Patent No.
US 7,296,195
App. No.
11/120,368
Granted
Nov 13, 2007
Kind
B2
Abstract

An apparatus for testing electronic devices employs a programmable device to adjust the timing of the strobes such that the strobes sample the bit stream from a device under test at or near the center of the bit position. The strobe time adjustment is performed based on pairs of strobe readings made around a number of different bit positions. The programmable device examines the pairs of strobe reading made around each of the different bit positions to determine whether or not a bit transition has occurred there. The programmable device selects the bit positions around which a bit transition has not occurred as eye candidates, and defines the center of the largest contiguous region of eye candidates as the center of the bit position.

Claims (37)

1. A method of testing an electronic device, comprising:

receiving an electronic signal representing a stream of bits from a device under test;

strobing the bits at two bit positions defined with respect to a number of different reference strobe times to generate at least one pair of strobe readings for each reference strobe time;

selecting one of the reference strobe times that generate strobe readings that indicate an absence of a bit transition, as a reference strobe time; and

testing said electronic device utilizing said reference strobe time.

2. The method according to claim 1 , wherein the strobe readings indicate an absence of a bit transition if the strobe readings are the same.

3. The method according to claim 1 , wherein said strobing and selecting are carried out during initialization phase of testing.

4. The method according to claim 1 , wherein T reference strobe times are used and represent a time series, and each reference strobe time is offset from its adjacent reference strobe time by UI divided by T, where UI is the time length of one bit interval.

5. The method according to claim 4 , wherein said selecting includes:

determining the longest contiguous sequence of reference strobe times that generate strobe readings that indicate an absence of a bit transition; and

selecting a reference strobe time that is at or near the middle of the longest contiguous sequence as the reference strobe time to be used during testing.

6. The method according to claim 1 , wherein multiple pairs of strobe readings are generated for each said reference strobe time.

7. The method according to claim 1 , wherein said selecting includes:

identifying reference strobe times that generate strobe readings that are the same each time a pair of strobe readings are generated for said reference strobe times, and selecting one of the identified reference strobe times as a reference strobe time to be used during testing.

8. A method for determining a reference time to be used in strobing bits in a bit stream generated by an electronic device, comprising:

strobing the bits at two bit positions defined with respect to a first reference time until a predefined number of pairs of strobe readings for said reference time has been strobed;

shifting the reference time by a fixed increment;

strobing the bits at two bit positions defined with respect to the shifted reference time until the predefined number of pairs of strobe readings for said shifted reference time has been strobed;

selecting one of the first reference time or one of the shifted reference times as a reference time to be used in strobing the bits in the bit stream; and

determining functionality of said electronic device utilizing said reference time to analyze said bit stream.

9. The method according to claim 8 , wherein said selecting includes:

identifying a set of reference time candidates, wherein a reference time is identified as a reference time candidate if each of the pairs of strobe readings for said reference time reference time outputs the same strobe reading; and

selecting the reference time to be used in strobing the bits in the bit stream from the set of reference time candidates.

10. The method according to claim 9 , wherein said selecting further includes:

determining the longest sequence of reference time candidates; and selecting the reference time candidate that is at or near the center of the longest sequence to be the reference time to be used in strobing the bits in the bit stream.

11. The method according to claim 8 , wherein the two bit positions of the first reference time include a first bit position that is strobed one fixed increment prior to the first reference time and a second bit position that is strobed one fixed increment after the first reference time.

12. The method according to claim 8 , wherein the two bit positions of the shifted reference time include a first bit position that is strobed one fixed increment prior to the shifted reference time and a second bit position that is strobed one fixed increment after the shifted reference time.

13. An apparatus for testing electronic devices, comprising:

a drive circuit for generating signals to be supplied to a device under test in accordance with a test program;

a response circuit for receiving a stream of bits from the device under test and strobing the bits with respect to a reference time to generate strobe readings; and

a device programmed to generate a number of different reference times to be used in strobing the bits, to collect multiple pairs of strobe readings for each of the different reference times, and to select one of the different reference times that generate strobe readings that indicate an absence of a bit transition as the reference time to be used in subsequent strobing.

14. The apparatus according to claim 13 , wherein the different reference times define a sequence of reference times having a common time interval, and the product of the number of different reference times and the common time interval is equal to the time length of one bit interval.

15. The apparatus according to claim 13 , wherein the device is programmed to select a reference time to be used in subsequent strobing from a group of reference time candidates, wherein a reference time is identified as a reference time candidate if each of the pairs of strobe readings for said reference time outputs the same strobe reading.

16. The apparatus according to claim 15 , wherein the device is programmed to determined the longest sequence of reference time candidates and to select the reference time candidate that is at or near the center of the longest sequence to be the reference time to be used in strobing the bits in the bit stream.

17. The apparatus according to claim 13 , wherein the strobe times for each pair of strobe readings are separated from each other by two time increments, wherein one time increment is equal to the time length of one bit interval divided by the number of different reference times.

18. The apparatus according to claim 13 , wherein the device is programmed with a strobe sequence applicable for one test period, wherein the bits are strobed during said one test period based on the strobe sequence and one of the different reference times.

19. The apparatus according to claim 18 , wherein the strobe sequence is defined relative to the beginning of the test period.

Assignments (9)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 047185, FRAME 0624 Recorded Mar 7, 2024
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS AGENT
To: XCERRA CORPORATION
Reel/Frame 066762/0811 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT STATEMENT THAT THIS DOCUMENT SERVES AS AN OATH/DECLARATION PREVIOUSLY RECORDED ON REEL 047185 FRAME 0628. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 28, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047675/0354 →
PATENT SECURITY AGREEMENT Recorded Oct 2, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0624 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 7261561 AND REPLACE WITH PATENT NUMBER 7231561 PREVIOUSLY RECORDED ON REEL 034660 FRAME 0188. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Feb 11, 2016
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 037824/0372 →
SECURITY AGREEMENT Recorded Dec 18, 2014
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 034660/0188 →
RELEASE OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Dec 18, 2014
From: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
To: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
Reel/Frame 034660/0394 →
CHANGE OF NAME Recorded May 27, 2014
From: LTX-CREDENCE CORPORATION
To: XCERRA CORPORATION
Reel/Frame 033032/0768 →
SECURITY AGREEMENT Recorded Jan 17, 2014
From: LTX-CREDENCE CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 032086/0476 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2005
From: SAKAITANI, KRIS
To: CREDENCE SYSTEMS CORPORATION
Reel/Frame 016534/0395 →