IP Library Granted Patent US 7,160,797
Granted Patent B2
US 7,160,797 · App. 11/121,703 · Granted Jan 9, 2007

Method of bumping die pads for wafer testing

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Quick Facts
Patent No.
US 7,160,797
App. No.
11/121,703
Granted
Jan 9, 2007
Kind
B2
Abstract

A method of processing a semiconductor wafer including a plurality of semiconductor dies is provided. The method includes providing a semiconductor wafer including a plurality of semiconductor dies, at least a portion of the semiconductor dies including contact pads for testing the respective semiconductor die. The method also includes positioning conductive bumps on the contact pads prior to completing wafer testing of the semiconductor wafer and prior to the singulation of the plurality of semiconductor dies from the semiconductor wafer. At least a portion of the conductive bumps are configured to be electrical paths during wafer testing of the semiconductor wafer.

Claims (20)

1. A method of processing a semiconductor wafer including a plurality of semiconductor dies, the method comprising the steps of:

providing a semiconductor wafer including a plurality of semiconductor dies, at least a portion of the semiconductor dies including contact pads for testing the respective semiconductor die; and

bump bonding conductive bumps on the contact pads prior to completing wafer testing of the semiconductor wafer and prior to the singulation of the plurality of semiconductor dies from the semiconductor wafer, at least a portion of the conductive bumps being configured to be electrical paths during wafer testing of the semiconductor wafer.

2. The method of claim 1 wherein the bump bonding step includes bump bonding the conductive bumps on the contact parts using a wire bonding took.

3. The method of claim 1 wherein the bump bonding step comprises (1) forming a free air ball at an end portion of a conductive wire, the conductive wire extending through a passage defined by a wire bonding tool, and (2) bump bonding the free air ball on one of the contact pads to form the conductive bump.

4. The method of claim 3 wherein step (2). comprises scrubbing the contact pads with the wire bonding tool.

5. The method of claim 1 wherein the bump bonding step includes bump bonding gold conductive bumps on the contact pads.

6. The method of claim 1 further comprising the step of performing wafer testing on the semiconductor wafer after the bump bonding step.

7. The method of claim 6 further comprising the step of singulating the plurality of semiconductor dies from the semiconductor wafer after the step of performing wafer testing.

8. The method of claim 7 further comprising the step of wire bonding a singulated one of the semiconductor dies to a substrate, the step of wire bonding including forming a first wire bond at a contact location on the substrate and forming a second wire bond at the conductive bump of the singulated one of the semiconductor dies.

9. The method of claim 8 further comprising arranging the singulated one of the semiconductor dies in a stacked die configuration on the substrate before the step of wire bonding.

10. The method of claim 1 further comprising the step of electrically coupling a singulated one of the semiconductor dies to a substrate wherein the conductive bumps facilitate the electrical coupling.

11. The method of claim 10 wherein the step of electrically coupling includes electrically coupling the singulated one of the semiconductor dies to the substrate using flip-chip techniques.

12. The method of claim 1 wherein the bump bonding step includes bump bonding a material including gold to form the conductive bumps.

13. The method of claim 12 further comprising the step of probing the conductive bumps using probe elements including gold.

14. The method of claim 12 further comprising the step of probing the conductive bumps using probe elements including a gold plating.

15. The method of claim 3 wherein the bump bonding step further includes raising the free air ball such that the free air ball is at least partially within a tip of the wire bonding tool prior to step (2).

16. The method of claim 6 wherein the step of performing wafer testing includes contacting each of the conductive bumps with a cantilever beam probe element.

17. The method of claim 16 wherein the step of performing wafer testing includes contacting each of the conductive bumps with the cantilever beam probe element where the cantilever beam probe element does not include a tip portion configured to contact the conductive bumps.

18. The method of claim 1 wherein the bump bonding step includes bump bonding a material including copper to form the conductive bumps.

Assignments (2)
MERGER Recorded Nov 3, 2005
From: KULICKE AND SOFFA INVESTMENTS, INC.
To: KULICKE AND SOFFA INDUSTRIES, INC.
Reel/Frame 016722/0294 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2005
From: BEATSON, DAVID T.
To: KULICKE AND SOFFA INVESTMENTS, INC.
Reel/Frame 016826/0785 →