IP Library Granted Patent US 7,300,862
Granted Patent B2
US 7,300,862 · App. 11/125,602 · Granted Nov 27, 2007

Method for manufacturing semiconductor device

Assignee: Dongbu Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,300,862
App. No.
11/125,602
Granted
Nov 27, 2007
Kind
B2
Abstract

High quality dielectric layers may be achieved without introducing excessive impurities when a semiconductor device is manufactured by a method that includes forming a lower wire layer on a structure above a semiconductor substrate, forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure, implanting carbon and oxygen (e.g., CO 2 ) into the silicon rich oxide (SRO) layer, and forming an organosilicate glass layer by heat-treating the implanted SRO layer.

Claims (37)

1. A method for manufacturing a semiconductor device, comprising:

forming a lower wire layer on a structure above a semiconductor substrate;

forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure;

implanting carbon and oxygen from a carbon and oxygen source material that does not contain hydrogen into the silicon rich oxide layer; and

heat-treating the implanted silicon rich oxide layer to form an organosilicate glass layer.

2. The method of claim 1 , wherein the carbon and oxygen source material consists essentially of CO 2 .

3. The method of claim 1 , wherein forming the silicon rich oxide layer comprises depositing the silicon rich oxide layer by plasma enhanced chemical vapor deposition.

4. The method of claim 3 , wherein the heat-treating is sequentially performed in atmospheres comprising O 2 gas, N 2 gas, and an inert or noble gas.

5. The method of claim 4 , further comprising, before forming the silicon rich oxide layer, forming a barrier layer on the lower wire layer and the structure.

6. The method of claim 5 , wherein the barrier layer comprises SiC.

7. The method of claim 1 , wherein the heat-treating is performed at a temperature of 400-600° C.

8. The method of claim 7 , wherein the heat-treating is sequentially performed in atmospheres comprising O 2 gas, N 2 gas, and an inert or noble gas.

9. The method of claim 8 , further comprising, before forming the silicon rich oxide layer, forming a barrier layer on the lower wire layer and the structure.

10. The method of claim 9 , wherein the barrier layer comprises SiC.

11. The method of claim 1 , further comprising, before forming the silicon rich oxide layer, forming a barrier layer comprising SiC on the lower wire layer and the structure, wherein:

forming the silicon rich oxide layer comprises depositing the silicon rich oxide layer by plasma enhanced chemical vapor deposition; and

the heat-treating comprises heating a chamber containing the substrate to a temperature of 400-600° C. sequentially in atmospheres comprising O 2 gas, N 2 gas, and an inert or noble gas.

12. A method for manufacturing a semiconductor device, comprising:

forming a lower wire layer on a structure above a semiconductor substrate;

forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure;

implanting carbon and oxygen from a carbon and oxygen source material into the silicon rich oxide layer; and

heat-treating the implanted silicon rich oxide layer sequentially in atmospheres comprising O 2 gas, N 2 gas, and an inert or noble gas to form an organosilicate glass layer.

13. The method of claim 12 , wherein the carbon and oxygen source material does not contain hydrogen.

14. The method of claim 12 , further comprising, before forming the silicon rich oxide layer, forming a barrier layer on the lower wire layer and the structure.

15. The method of claim 14 , wherein the barrier layer comprises SiC.

16. A method for manufacturing a semiconductor device, comprising:

forming a lower wire layer on a structure above a semiconductor substrate;

forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure;

implanting CO 2 into the silicon rich oxide layer; and

heat-treating the implanted silicon rich oxide layer to form an organosilicate glass layer.

17. The method of claim 16 , wherein the heat-treating is performed at a temperature of 400-600° C.

18. The method of claim 16 , wherein the heat-treating is sequentially performed in atmospheres of O 2 gas, N 2 gas, and an inert or noble gas.

19. The method of claim 16 , further comprising, before forming the silicon rich oxide layer, forming a barrier layer on the lower wire layer and the structure.

20. A method for manufacturing a semiconductor device, comprising:

forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on a lower wire layer and a structure above a semiconductor substrate;

implanting carbon and oxygen into the silicon rich oxide layer from a source material that does not contain hydrogen; and

heat-treating the implanted silicon rich oxide layer to form an organosilicate glass layer.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041376/0111 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017749 FRAME 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 21, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017821/0670 →
CHANGE OF NAME Recorded Jun 8, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017749/0335 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2005
From: LEE, JAE-SUK
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 016554/0844 →
Priority Claims (1)
KR 10-2004-0032924 · May 11, 2004 · national
Continuity (1)
Related Publication 20050255709A1 · Nov 17, 2005