IP Library Granted Patent US 7,447,618
Granted Patent B2
US 7,447,618 · App. 11/126,988 · Granted Nov 4, 2008

Method and system for ASIC simulation

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Quick Facts
Patent No.
US 7,447,618
App. No.
11/126,988
Granted
Nov 4, 2008
Kind
B2
Abstract

Method and system for testing an Application Specific Integrated Circuit is provided. The system includes, a simulator that interfaces with a host computer emulation module; and a virtual interface driver (“VID”) that interfaces with the host computer emulation module and a bus interface module, wherein the VID maps plural stimulus to the simulator via the bus interface module. The method includes, loading a bus functional module in an ASIC simulator; determining configuration of devices supported by a host emulation system; and mapping configuration information to the host emulation system, wherein a virtual interface driver maps the configuration information to the host emulation system.

Claims (21)

1. A system for testing an Application Specific Integrated Circuit (ASIC), comprising:

a first computing system executing a simulator for simulating a plurality of ASIC operations; wherein the simulator interfaces with a host bus interface module (HIBFM) configured to receive a stimulus via a network link; and

a second computing system executing a host computer emulation (HCE) module and a virtual interface driver (VID); wherein the HCE module emulates operations executed by a host system in a virtual environment; and the VID interfaces with both the HCE and HIBFM; and

wherein the VID (a) maps configuration information regarding the ASIC under test in the simulator to a virtual address space of the HCE; (b) formats a transaction request from the HCE; (c) transmits the formatted transaction request to the HIBFM, and provides a stimulus for the ASIC under test; and (d) after the simulator executes an operation in response to the stimulus, the VID receives operation results transmitted by the HIBFM via the network link.

2. The system of claim 1 , wherein the VID determines configuration of devices that are supported by the HIBFM.

3. The system of claim 2 , wherein the VID maps configuration of devices that are supported to the host computer emulation module.

4. The system of claim 1 , wherein the host bus interface module sends information from the simulator to the host computer emulation module via the VID.

5. A method for testing an application specific integrated circuit (“ASIC”), comprising:

loading a host bus interface functional module HIBFM in an ASIC simulator executed by a first computing system; wherein the simulator simulates a plurality of ASIC operations;

determining configuration of devices supported by a host emulation system HCE executed by a second computing system; wherein the HCE emulates operations executed by a host computing system in a virtual environment; and a virtual interface driver (VID) executed by the second computing system determines configuration information by interfacing with the HIBFM via a network link; and

mapping the configuration information to the HCE, wherein the VID (a) maps configuration information regarding the ASIC under test in the simulator to a virtual address space of the HCE; (b) formats a transaction request from the HCE involving the ASIC; (c) transmits the formatted transaction request to the host and provides a stimulus for the ASIC under test; and (d) after the simulator executes an operation in response to the stimulus, the VID receives operation results transmitted by the HIBFM via the network link.

6. The method of claim 5 , wherein the virtual interface driver maps requests for register read and write operations to the host emulation system and converts them into transaction requests.

7. The method of claim 5 , wherein the transaction requests are sent to the HIBFM.

8. The method of claim 5 , wherein the ASIC under test is used for a host bus adapter.

9. A system for testing a host bus adapter used in a network, comprising:

a first computing system executing a simulator for simulating a plurality of ASIC operations; wherein the simulator interfaces with a host host bus interface module (HIBFM) configured to receive a stimulus via a network link; and

a second computing system executing a host computer emulation (HCE) module and a virtual interface driver (VID); wherein the HCE module emulates operations executed by a host system in a virtual environment; and the VID interfaces with both the HCE and HIBFM; and

wherein the VID (a) maps configuration information regarding the ASIC under test in the simulator to a virtual address space of the HCE; (b) formats a transaction request from the HCE; (c) transmits the formatted transaction request to the HIBFM and provides a stimulus for the ASIC under test; and (d) after the simulator executes an operation in response to the stimulus, the VID receives operation results transmitted by the HIBFM via the network link.

10. The system of claim 9 , wherein the VID determines configuration of devices that are supported by the host bus interface module.

11. The system of claim 10 , wherein the VID maps configuration of devices that are supported to the host computer emulation module.

12. The system of claim 10 , wherein the host bus interface module sends information from the simulator to the host computer emulation module via the VID.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CHANGE OF NAME Recorded Oct 8, 2018
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 047205/0953 →
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2018
From: JP MORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: CAVIUM, INC; CAVIUM NETWORKS LLC; QLOGIC CORPORATION
Reel/Frame 046496/0001 →
MERGER Recorded Oct 18, 2017
From: QLOGIC CORPORATION
To: CAVIUM, INC.
Reel/Frame 044812/0504 →
SECURITY AGREEMENT Recorded Mar 1, 2017
From: QLOGIC CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 041854/0119 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2005
From: STEFFEN, DAVID N.
To: QLOGIC CORPORATION
Reel/Frame 016562/0083 →