Method of fabricating capacitor in semiconductor device and semiconductor device using the same
View Patent ↗A method of fabricating a capacitor in a semiconductor device is provided. The method includes steps of depositing a metal layer for forming a lower electrode on a semiconductor substrate; forming, using an oxidation rate differential, an uneven structure in correspondence with a grain boundary of the metal layer; forming a dielectric layer on the lower electrode having the uneven structure; and forming an upper electrode on the dielectric layer.
1. A method of fabricating a capacitor in a semiconductor device, comprising:
depositing a titanium layer having interfacing metal grains for forming a lower electrode on a semiconductor substrate;
oxidizing an upper surface of the titanium layer at a temperature of about 65 to 80° C. to form an oxidation layer, wherein an oxidation rate differential exists between interfaces of the metal grains and interior surfaces of the metal grains;
etching the oxidation layer at a temperature of about 45 to 80° C. to expose an uneven upper surface of the titanium layer in correspondence with the metal grain interfaces of the titanium layer;
forming a dielectric layer on the titanium layer having the uneven upper surface; and
forming an upper electrode on the dielectric layer.
2. The method of claim 1 , wherein etching the oxidation layer comprises exposing the oxidation layer to hydrofluoric acid (HF) vapor.
3. The method of claim 2 , wherein the HF vapor comprises 39.6% HF.
4. The method of claim 3 , wherein etching the oxidation layer comprises exposing the oxidation layer to the 39.6% HF vapor at 45˜80° C. for five to fifteen seconds.
5. The method of claim 1 , wherein said oxidizing an upper surface of the titanium layer comprises immersing said titanium layer in a hydrogen peroxide (H 2 O 2 ) bath.
6. The method of claim 5 , wherein the H 2 O 2 bath comprises H 2 O 2 and deionized water in a hydrogen peroxide-to-deionized water ratio of 1:2˜1:4.
7. The method of claim 5 , wherein the H 2 O 2 bath has a temperature of 65˜80° C.
8. The method of claim 1 , wherein the uneven upper surface of the titanium layer comprises a multitude of prominences at exposed surfaces of the metal grains and depressions at the interfaces.
9. The method of claim 1 , wherein etching the oxidation layer removes fine particles remaining on the titanium layer.
10. The method of claim 1 , wherein the titanium layer comprises a stack of titanium nitride and titanium (TiN/Ti) or tantalum nitride and titanium (TaN/Ti).
11. The method of claim 1 , wherein the dielectric layer comprises silicon nitride (SiN) or silicon oxide (SiO 2 ).
12. The method of claim 1 , wherein the upper electrode comprises a stack of titanium nitride, tantalum nitride, and titanium (TiN/TaN/Ti).
13. The method of claim 1 , wherein the upper and lower electrodes are patterned to form a capacitor.
14. The method of claim 1 , wherein oxidizing the upper surface of the titanium layer comprises oxidizing the interfaces between the metal grains at a higher rate than exposed surfaces of the metal grains.
15. The method of claim 1 , further comprising forming an insulating interlayer on or over the semiconductor substrate prior to depositing the titanium layer.
16. The method of claim 15 , further comprising forming and patterning a metal wiring layer on or over the insulating interlayer prior to forming the titanium layer.
17. The method of claim 16 , wherein the titanium layer is formed on the metal wiring layer.
18. The method of claim 16 , wherein the metal wiring layer comprises copper.
19. The method of claim 1 , wherein oxidizing the titanium layer comprises forming titanium oxide on a top surface of the metal layer, and the titanium oxide at the interfaces has a greater thickness than at the exposed surfaces of the metal grains.