Thin leadless plastic chip carrier
View Patent ↗A leadless plastic chip carrier is fabricated by selectively etching a leadframe strip to reduce a thickness of the strip at a portion thereof. Selectively masking the surface of the leadframe strip using a mask, follows selectively etching, to provide exposed areas of the surface at the portion and contact pad areas on leadframe the strip. At least one layer of metal is deposited on the exposed areas to define a die attach pad on the portion of the leadframe strip with reduced thickness and to define contact pads on the surface of the strip. At least one semiconductor die is mounted to the die attach pad, followed by wire bonding the at least one semiconductor die to ones of the contact pads. The at least one semiconductor die, the wire bonds, and the contact pads are covered with an overmold material and the leadframe strip is etched to thereby remove the leadframe strip. The leadless plastic chip carrier is singulated from the leadframe strip.
1. A process for fabricating a leadless plastic chip carrier, comprising:
selectively etching a leadframe strip to reduce a thickness of said leadframe strip at an etched-down portion thereof;
selectively masking said leadframe strip using a mask to provide exposed areas at said etched-down portion and at non-etched contact pad areas on said leadframe strip;
depositing at least one layer of metal on said exposed areas to define a die attach pad on the etched-down portion of said leadframe strip and to define contact pads on only said non-etched contact pad areas;
mounting at least one semiconductor die to said die attach pad;
wire bonding said at least one semiconductor die to ones of said contact pads;
covering said at least one semiconductor die, said wire bonds, and said contact pads with an overmold material;
etching said leadframe strip to thereby remove said leadframe strip; and
singulating said leadless plastic chip carrier.
2. The process according to claim 1 , wherein said selectively etching comprises:
depositing a photo-imageable etch resist on at least one surface of said leadframe strip;
imaging and developing said etch resist to expose said surface at said etched-down portion; and
etching said leadframe strip to thereby reduce the thickness of said leadframe strip at said etched-down portion.
3. The process according to claim 1 , additionally comprising removing said mask prior to covering said at least one semiconductor die.
4. The process according to claim 1 , wherein said depositing at least one layer of metal comprises depositing a plurality of layers of metal on said exposed areas to define said die attach pad and said contact pads.
5. The process according to claim 1 , additionally comprising:
masking said die attach pad after depositing said at least one layer;
depositing at least one further layer of metal on said at least one layer of metal at said contact pads thereby further defining said contact pads; and
stripping the mask from said die attach pad and said mask from said surface of said leadframe strip, prior to mounting said at least one semiconductor die.
6. The process according to claim 5 , wherein depositing at least one metal comprises depositing layers of gold, nickel and copper, or silver and copper, or palladium, nickel and copper.
7. The process according to claim 6 , wherein depositing at least one further layer of metal comprises depositing layers of nickel and gold, or silver, or nickel and palladium.
8. The process according to claim 1 , wherein mounting at least one semiconductor die comprises mounting a plurality of semiconductor dice in a stack and wire bonding comprises fixing wire bonds between each of said semiconductor dice and ones of said contact pads.
9. The process according to claim 1 , further comprising fixing a plurality of solder ball contacts on said contact pads after said etching said leadframe strip to thereby remove said leadframe strip.
10. A process for fabricating a leadless plastic chip carrier, comprising:
selectively etching a leadframe strip to reduce a thickness of said leadframe strip at a portion thereof;
selectively masking said leadframe strip using a mask to provide exposed areas at said portion and contact pad areas on said strip;
depositing at least one layer of metal on the exposed areas to define a die attach pad on the portion of said strip with reduced thickness and to define contact pads;
masking said die attach pad after depositing said at least one layer;
depositing at least one further layer of metal on said at least one layer of metal at said contact pads thereby further defining said contact pads;
stripping the mask from said die attach pad and said mask from said surface of said leadframe strip;
mounting at least one semiconductor die to said die attach pad;
wire bonding said at least one semiconductor die to ones of said contact pads;
covering said at least one semiconductor die, said wire bonds, and said contact pads with an overmold material;
etching said leadframe strip to thereby remove said leadframe strip; and
singulating said leadless plastic chip carrier.
11. The process according to claim 10 , wherein mounting at least one semiconductor die comprises mounting a plurality of semiconductor dice in a stack and wire bonding comprises fixing wire bonds between each of said semiconductor dice and ones of said contact pads.
12. The process according to claim 10 , wherein depositing said at least one layer of metal comprises depositing layers of gold, nickel and copper, or silver and copper, or palladium, nickel and copper.
13. The process according to claim 10 , wherein depositing at least one further layer of metal comprises depositing layers of nickel and gold, or silver, or nickel and palladium.
14. The process according to claim 10 , further comprising fixing a plurality of solder ball contacts on said contact pads after said etching said leadframe strip to thereby remove said leadframe strip.