Integrated circuit with heat conducting structures for localized thermal control
An integrated circuit die includes a substrate having an upper surface, at least one active device formed in a first area of the upper surface of the substrate, and a plurality of layers formed on the upper surface of the substrate above the at least one active device. A first stacked heat conducting structure is provided, spanning from a point proximate the first area of the upper surface of the substrate through the plurality of layers. A lateral heat conducting structure is formed above the uppermost layer of the plurality of layers and in thermal contact with the first stacked heat conducting structure. The invention advantageously facilitates the dissipation of heat from the integrated circuit die, particularly from high-power sources or other localized hot spots.
1. An integrated circuit die comprising:
a substrate having an upper surface;
at least one active device formed in a first area of the upper surface of the substrate;
a plurality of layers formed on the upper surface of the substrate above the at least one active device;
a first stacked heat conducting structure spanning from a point proximate the first area of the upper surface of the substrate through the plurality of layers;
a lateral heat conducting structure formed above the uppermost layer of the plurality of layers and in thermal contact with the first stacked heat conducting structure; and
a second stacked heat conducting structure in thermal contact with the lateral heat conducting structure and spanning from a point proximate to a second area of the upper surface of the substrate through the plurality of layers, the second area of the substrate being laterally removed from the first area of the substrate;
wherein the first stacked heat conducting structure is electrically isolated from the active device;
wherein the first stacked heat conducting structure is formed vertically above the active device;
wherein an initial element of the first stacked heat conducting structure is in thermal contact with an oxide layer overlying the active device; and
wherein heat generated in the first area by the active device is conducted by the first stacked heat conducting structure to the lateral heat conducting structure.
2. The integrated circuit die of claim 1 wherein the first stacked heat conducting structure comprises an interconnected arrangement of one or more metal trenches formed in respective ones of the plurality of layers and one or more metal vias passing through respective ones of the plurality of layers.
3. The integrated circuit die of claim 1 wherein heat is conducted from the first area to the second area via the first stacked heat conducting structure, the lateral heat conducting structure, and the second stacked heat conducting structure.
4. The integrated circuit die of claim 1 wherein the first area comprises a heat source of the integrated circuit die and the second area comprises a cooler area of the substrate relative to the first area, heat being removable from the second area via a back surface of the substrate.
5. The integrated circuit die of claim 1 further comprising a third stacked heat conducting structure in thermal contact with the lateral heat conducting structure and spanning from a point proximate a third area of the upper surface of the substrate through the plurality of layers, the third area of the substrate being laterally removed from the first and second areas of the substrate, heat being conducted from the first area to the third area via the first stacked heat conducting structure, the lateral heat conducting structure, and the third stacked heat conducting structure.
6. The integrated circuit die of claim 5 wherein the lateral heat conducting structure comprises a plurality of branches, the branches being coupled at respective ends thereof to respective ones of the stacked heat conducting structures.
7. The integrated circuit die of claim 1 wherein the lateral heat conducting structure comprises a plurality of branches emanating from a central portion of the structure, the central portion being coupled to the first stacked heat conducting structure.
8. The integrated circuit die of claim 2 wherein the first stacked heat conducting structure comprises as the initial element thereof a first via embedded in the oxide layer overlying the active device.
9. The integrated circuit die of claim 2 wherein the first stacked heat conducting structure comprises as the initial element thereof a first trench formed in a metallization layer above the oxide layer overlying the active device.
10. The integrated circuit die of claim 1 wherein the first stacked heat conducting structure comprises a metal structure formed at least in part from copper.
11. The integrated circuit die of claim 1 wherein the lateral heat conducting structure comprises a metal structure formed at least in part from aluminum.
12. A packaged integrated circuit comprising:
an integrated circuit die comprising a substrate having an upper surface; at least one active device formed in a first area of the upper surface of the substrate; a plurality of layers formed on the upper surface of the substrate above the at least one active device; a first stacked heat conducting structure spanning from a point proximate the first area of the upper surface of the substrate through the plurality of layers; a lateral heat conducting structure formed above the uppermost layer of the plurality of layers and in thermal contact with the first stacked heat conducting structure; and a second stacked heat conducting structure in thermal contact with the lateral heat conducting structure and spanning from a point proximate to a second area of the upper surface of the substrate through the plurality of layers, the second area of the substrate being laterally removed from the first area of the substrate; and
a package enclosing the integrated circuit die;
wherein the first stacked heat conducting structure is electrically isolated from the active device;
wherein the first stacked heat conducting structure is formed directly vertically above the active device;
wherein an initial element of the first stacked heat conducting structure is in thermal contact with an oxide layer overlying the active device; and
wherein heat generated in the first area by the active device is conducted by the first stacked heat conducting structure to the lateral heat conducting structure.
13. The packaged integrated circuit of claim 12 wherein the package comprises one of a plastic package, a ceramic package and a flip-chip package.
14. A method of forming an integrated circuit die comprising:
providing a substrate having an upper surface;
forming at least one active device in a first area of the upper surface of the substrate;
forming a plurality of layers on the upper surface of the substrate above the at least one active device;
providing a first stacked heat conducting structure spanning from a point proximate the first area of the upper surface of the substrate through the plurality of layers;
forming a lateral heat conducting structure above the uppermost layer of the plurality of layers and in thermal contact with the first stacked heat conducting structure; and
providing a second stacked heat conducting structure in thermal contact with the lateral heat conducting structure and spanning from a point proximate to a second area of the upper surface of the substrate through the plurality of layers, the second area of the substrate being laterally removed from the first area of the substrate;
wherein the first stacked heat conducting structure is electrically isolated from the active device;
wherein the first stacked heat conducting structure is formed vertically above the active device;
wherein an initial element of the first stacked heat conducting structure is in thermal contact with an oxide layer overlying the active device; and
wherein heat generated in the first area by the active device is conducted by the first stacked heat conducting structure to the lateral heat conducting structure.
15. The method of claim 14 further comprising the step of enclosing the integrated circuit die in a package to form a packaged integrated circuit.
16. The method of claim 14 wherein the step of providing a first stacked heat conducting structure comprises providing an interconnected arrangement of one or more metal trenches formed in respective ones of the plurality of layers and one or more metal vias passing through respective ones of the plurality of layers.
17. The method of claim 14 wherein the step of forming a lateral heat conducting structure further comprises forming the lateral heat conducting structure as a plurality of branches, the branches being coupled at respective ends thereof to respective ones of a plurality of stacked heat conducting structures.
18. The method of claim 14 wherein the step of forming a lateral heat conducting structure further comprises the step of forming the lateral heat conducting structure as a plurality of branches emanating from a central portion of the structure, the central portion being coupled to the first stacked heat conducting structure.
19. The integrated circuit of claim 1 wherein the lateral heat conducting structure is formed in an under bond metallization layer of the integrated circuit die, the under bond metallization layer being formed over the plurality of layers.
20. The integrated circuit of claim 1 wherein the lateral heat conducting structure is formed above a passivation layer of the integrated circuit die, the passivation layer comprising the uppermost layer of the plurality of layers.
21. The integrated circuit of claim 1 wherein only one lateral heat conducting structure is formed between the first stacked heat conducting structure and the second stacked heat conducting structure.