Anti-punch-through semiconductor device
View Patent ↗An anti-punch-through semiconductor device is provided. The anti-punch-through semiconductor device includes a substrate, at least an isolation region and a plurality of trench devices. The trench device is disposed in the substrate. The trench device includes a source/drain region. The source/drain region of the trench device is disposed at the bottom of the trench device. The isolation region is disposed in the substrate and between the source/drain regions of each trench device.
1. An anti-punch-through semiconductor device, comprising:
a silicon layer;
a plurality of trench devices, disposed in the silicon layer, wherein the trench device comprises a source/drain region, and the source/drain region is disposed in the bottom of the trench device; and s
at least one insulation region, covered by the silicon layer and disposed between the source/drain regions of each trench device.
2. The anti-punch-through semiconductor device of claim 1 , wherein the thickness of the at least one insulation region is about 100 Å-1000 Å.
3. The anti-punch-through semiconductor device of claim 1 , wherein the material of the at least one insulation region includes silicon oxide.
4. The anti-punch-through semiconductor device of claim 1 , wherein the shape of the at least one insulation region includes blocks or parallel stripes.
5. The anti-punch-through semiconductor device of claim 1 , wherein the trench device includes trench memory.
6. The anti-punch-through semiconductor device of claim 1 , further comprising a substrate, and the silicon layer and the at least one insulation region are both disposed on the substrate.