Semiconductor chip package with thermoelectric cooler
The semiconductor chip package may include a substrate having circuit patterns and substrate pads connected with the circuit patterns. At least one semiconductor chip is mounted on the substrate, and a thermoelectric cooler having a P-type material plate and an N-type material plate is mounted on the semiconductor chip. Portions of the P-type and N-type material plates may be attached on the semiconductor chip. The P-type and N-type material plates may be electrically connected to the circuit patterns of the substrate to be provided with DC power.
1. A semiconductor chip package comprising:
at least one semiconductor chip mounted on a substrate; and
at least one thermoelectric cooler including a P-type material plate and an N-type material plate, a portion of the P-type material plate being connected with a portion of the N-type material plate on the semiconductor chip, a portion of the P-type and N-type material plates disposed directly on the substrate, the P-type and N-type material plates being electrically connected to circuit patterns of the substrate being provided with DC power.
2. The semiconductor chip package of claim 1 , wherein the semiconductor chip has bonding pads arranged along the opposing edges and the P-type and N-type material plates are arranged clear of the bonding pads of the semiconductor chip.
3. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the P-type and N-type material plates arranged at 90 degrees to one another.
4. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the P-type and N-type material plates arranged in the same direction relative to the semiconductor chip.
5. The semiconductor chip package of claim 1 , wherein a plurality of semiconductor chips are stacked on the substrate and a thermoelectric cooler is formed between at least two adjacent pairs of semiconductor chips, portions of the P-type material plates forming the thermoelectric coolers are connected to each other, and portions of the N-type material plates forming the thermoelectric coolers are connected to each other.
6. The semiconductor chip package of claim 1 , wherein a plurality of semiconductor chips are horizontally arranged on the substrate and a portion of at least any one of the P-type and N-type material plates is attached on at least one semiconductor chips.
7. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the P-type and N-type material plates connected to substrate pads of the substrate.
8. The semiconductor chip package of claim 7 , wherein the thermoelectric cooler has the P-type and N-type material plates connected to substrate pads of the substrate by wires.
9. The semiconductor chip package of claim 7 , wherein the thermoelectric cooler has the P-type and N-type material plates disposed on and connected to substrate pads of the substrate directly.
10. The semiconductor chip package of claim 1 , wherein at least one of the P-type and N-type material plates has a comb shaped portion and the comb shaped portion is located on the semiconductor chip.
11. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the P-type and N-type material plates that include individual parts and the individual parts of the P-type and N-type material plates are electrically connected in series.
12. The semiconductor chip package of claim 11 , wherein the individual parts of the P-type and N-type material plates are connected by a conductive material plate.
13. The semiconductor chip package of claim 1 , wherein a single semiconductor chip is connected to the substrate by bumps and a portion of the thermoelectric cooler is attached on the semiconductor chip.
14. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the N-type material plate attached on the semiconductor chip and the P-type material plate attached on the N-type material plate, and the N-type material plate is connected to an anode and the P-type material plate is connected to a cathode.
15. The semiconductor chip package of claim 1 , wherein the thermoelectric cooler has the P-type material plate attached on the semiconductor chip and the N-type material plate attached on the P-type material plate, and the P-type material plate is connected to an anode and the N-type material plate is connected to a cathode.
16. The semiconductor chip package of claim 1 , wherein two semiconductor chips are stacked on the substrate and one of the N-type and P-type material plates is attached on a lower of the two semiconductor chips and one of the N-type and P-type material plates is attached on an upper of the two semiconductor chips.
17. The semiconductor chip package of claim 1 , wherein three or more semiconductor chips are stacked on the substrate and a thermoelectric cooler is formed between more than one pair of adjacent semiconductor chips.
18. The semiconductor chip package of claim 17 , wherein portions of the N-type material plates outside the semiconductor chip are stacked on one of the N-type material plates, and portions of the P-type material plates outside the semiconductor chip are stacked on one of the P-type material plates.
19. A module-type package having a plurality of semiconductor chip packages, at least one of the semiconductor chip packages being the semiconductor chip package of claim 1 .
20. A module-type package having a plurality of semiconductor chip packages, each package comprising:
at least one semiconductor chip;
a substrate having circuit patterns and the semiconductor chip mounted thereon; and
an encapsulant sealing the semiconductor chip;
at least one of the semiconductor chip packages being the semiconductor chip package of claim 1 .