IP Library Granted Patent US 7,420,199
Granted Patent B2
US 7,420,199 · App. 11/182,022 · Granted Sep 2, 2008

Resistivity changing memory cell having nanowire electrode

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Quick Facts
Patent No.
US 7,420,199
App. No.
11/182,022
Granted
Sep 2, 2008
Kind
B2
Abstract

A memory cell includes a first electrode comprising a nanowire, a second electrode, and phase-change material between the first electrode and the second electrode.

Claims (36)

1. An integrated circuit having a memory cell comprising:

a first electrode comprising a nanowire;

a second electrode; and

resistivity changing material between the first electrode and the second electrode,

wherein a portion of the nanowire is laterally surrounded by the resistivity changing material.

2. The integrated circuit of claim 1 , further comprising:

a catalyst material contacting the first electrode; and

a landing pad contacting the catalyst material.

3. The integrated circuit of claim 2 , wherein the catalyst material is selected from the group consisting of Ti, Pd, Pt, Au, Cu, Co, Cr, Hf, Ir, Mn, Mo, Ni, Rh, Ta, W, and Zr.

4. The integrated circuit of claim 2 , wherein the landing pad comprises one of tungsten and copper.

5. The integrated circuit of claim 2 , wherein the landing pad comprises a metal silicide.

6. The integrated circuit of claim 1 , wherein the resistivity changing material comprises a chalcogenide.

7. A memory cell comprising:

a first electrode comprising a nanowire;

a second electrode; and

phase-change material between the first electrode and the second electrode,

wherein a portion of the nanowire is laterally surrounded by the phase-change material.

8. The memory cell of claim 7 , further comprising:

a catalyst material contacting the first electrode; and

a landing pad contacting the catalyst material.

9. The memory cell of claim 8 , wherein the catalyst material is selected from the group consisting of Ti, Pd, Pt, Au, Cu, Co, Cr, Hf, Ir, Mn, Mo, Ni, Rh, Ta, W, and Zr.

10. The memory cell of claim 8 , wherein the landing pad comprises one of tungsten and copper.

11. The memory cell of claim 8 , wherein the landing pad comprises a metal silicide.

12. The memory cell of claim 7 , wherein the phase-change material comprises a chalcogenide.

13. An integrated circuit having a memory cell comprising:

a first electrode comprising a nanowire;

a second electrode; and

resistive memory material between the first electrode and the second electrode,

wherein a portion of the nanowire is laterally surrounded by the resistive memory material.

14. The integrated circuit of claim 13 , further comprising:

a catalyst material contacting the first electrode; and

a landing pad contacting the catalyst material.

15. The integrated circuit of claim 14 , wherein the catalyst material is selected from the group consisting of Ti, Pd, Pt, Au, Cu, Co, Cr, Hf, Ir, Mn, Mo, Ni, Rh, Ta, W, and Zr.

16. The integrated circuit of claim 14 , wherein the landing pad comprises one of tungsten and copper.

17. The integrated circuit of claim 14 , wherein the landing pad comprises a metal silicide.

18. The integrated circuit of claim 13 , wherein the resistive memory material comprises a chalcogenide.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036701/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2012
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 028853/0605 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2006
From: GUTSCHE, MARTIN ULRICH; SEIDL, HARALD; KREUPL, FRANZ
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017052/0704 →